removing spirv headers dependencies, reworking architecture

This commit is contained in:
2025-12-24 18:09:16 +01:00
parent b4ff6f559b
commit 885919952c
15 changed files with 2969 additions and 140 deletions

View File

@@ -10,9 +10,6 @@ pub fn build(b: *std.Build) void {
.optimize = optimize,
});
const spirv_headers = b.dependency("spirv_headers", .{});
mod.addSystemIncludePath(spirv_headers.path("include/spirv/unified1"));
const lib = b.addLibrary(.{
.name = "spirv_interpreter",
.root_module = mod,

View File

@@ -1,12 +1,7 @@
.{
.name = .SPIRV_Interpreter,
.version = "0.0.1",
.dependencies = .{
.spirv_headers = .{
.url = "git+https://github.com/KhronosGroup/SPIRV-Headers#0a7f626a6ae86284a413d105b47a6fb413bf6c92",
.hash = "N-V-__8AAGOhPABkbhEc-SenlpOzOI4ppi0CDXVSteii5ywV",
},
},
.dependencies = .{},
.minimum_zig_version = "0.15.2",
.paths = .{
"build.zig",

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@@ -10,11 +10,13 @@ pub fn main() !void {
const allocator = gpa.allocator();
const ctx = try spv.Interpreter.init();
defer ctx.deinit();
const module = try spv.Module.init(allocator, &ctx, @ptrCast(@alignCast(shader_source)));
var module = try spv.Module.init(allocator, @ptrCast(@alignCast(shader_source)));
defer module.deinit(allocator);
var rt = try spv.Runtime.init(&module);
defer rt.deinit();
try rt.callEntryPoint(0);
}
std.log.info("Successfully executed", .{});
}

242
example/shader.spvasm git.filemode.normal_file
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@@ -0,0 +1,242 @@
; SPIR-V
; Version: 1.5
; Generator: Zig Software Foundation Zig Compiler; 2048
; Bound: 126
; Schema: 0
OpCapability Shader
OpCapability Matrix
OpCapability Int8
OpCapability Int16
OpMemoryModel Logical GLSL450
OpEntryPoint Fragment %105 "main" %frag_color
OpExecutionMode %105 OriginUpperLeft
%5 = OpString "shader.zig"
%26 = OpString "gpu.zig"
OpSourceExtension "zig_errors:"
OpSource Zig 2048
OpName %void "void"
OpName %f32 "f32"
OpName %u32 "u32"
OpName %shader_main "shader.main"
OpName %gpu_location__anon_545 "gpu.location__anon_545"
OpName %initializer_of_builtin_zig_backend "initializer of builtin.zig_backend"
OpName %u8 "u8"
OpName %initializer_of_start_simplified_logic "initializer of start.simplified_logic"
OpName %initializer_of_builtin_output_mode "initializer of builtin.output_mode"
OpName %frag_color "frag_color"
OpMemberName %Target_Cpu_Feature_Set 0 "ints"
OpName %Target_Cpu_Feature_Set "Target.Cpu.Feature.Set"
OpName %Target_Cpu_Feature_Set "Target.Cpu.Feature.Set"
OpName %Target_Cpu_Feature_Set "Target.Cpu.Feature.Set"
OpName %initializer_of_Target_Cpu_Feature_Set_empty "initializer of Target.Cpu.Feature.Set.empty"
OpMemberName %_struct_57 0 "ptr"
OpMemberName %_struct_57 1 "len"
OpName %Target_Cpu_Feature_Set "Target.Cpu.Feature.Set"
OpMemberName %Target_Cpu_Model 0 "name"
OpMemberName %Target_Cpu_Model 1 "llvm_name"
OpMemberName %Target_Cpu_Model 2 "features"
OpName %Target_Cpu_Model "Target.Cpu.Model"
OpName %Target_Cpu_Feature_Set "Target.Cpu.Feature.Set"
OpMemberName %Target_Cpu 0 "arch"
OpMemberName %Target_Cpu 1 "model"
OpMemberName %Target_Cpu 2 "features"
OpName %Target_Cpu "Target.Cpu"
OpName %Target_Cpu_Feature_Set "Target.Cpu.Feature.Set"
OpName %Target_Cpu_Model "Target.Cpu.Model"
OpName %Target_Cpu_Feature_Set "Target.Cpu.Feature.Set"
OpName %Target_Cpu "Target.Cpu"
OpName %Target_Cpu_Feature_Set "Target.Cpu.Feature.Set"
OpName %Target_Cpu_Model "Target.Cpu.Model"
OpName %Target_Cpu_Feature_Set "Target.Cpu.Feature.Set"
OpName %Target_Cpu_Model "Target.Cpu.Model"
OpName %Target_Cpu_Feature_Set "Target.Cpu.Feature.Set"
OpName %Target_Cpu_Model "Target.Cpu.Model"
OpName %Target_Cpu_Feature_Set "Target.Cpu.Feature.Set"
OpName %Target_Cpu_Feature_Set "Target.Cpu.Feature.Set"
OpName %Target_Cpu_Feature_Set "Target.Cpu.Feature.Set"
OpName %Target_Cpu_Model "Target.Cpu.Model"
OpName %Target_Cpu_Feature_Set "Target.Cpu.Feature.Set"
OpName %Target_Cpu "Target.Cpu"
OpName %initializer_of_builtin_cpu "initializer of builtin.cpu"
OpMemberName %Target_DynamicLinker 0 "buffer"
OpMemberName %Target_DynamicLinker 1 "len"
OpName %Target_DynamicLinker "Target.DynamicLinker"
OpName %Target_DynamicLinker "Target.DynamicLinker"
OpName %Target_DynamicLinker "Target.DynamicLinker"
OpName %initializer_of_Target_DynamicLinker_none "initializer of Target.DynamicLinker.none"
OpName %Target_Cpu_Feature_Set "Target.Cpu.Feature.Set"
OpName %Target_Cpu_Model "Target.Cpu.Model"
OpName %Target_Cpu_Feature_Set "Target.Cpu.Feature.Set"
OpName %Target_Cpu_Model "Target.Cpu.Model"
OpName %initializer_of___anon_1004 "initializer of __anon_1004"
OpName %Target_Cpu_Feature_Set "Target.Cpu.Feature.Set"
OpName %Target_Cpu_Feature_Set "Target.Cpu.Feature.Set"
OpName %Target_Cpu_Feature_Set "Target.Cpu.Feature.Set"
OpName %Target_Cpu_Model "Target.Cpu.Model"
OpName %initializer_of_Target_spirv_cpu_vulkan_v1_2 "initializer of Target.spirv.cpu.vulkan_v1_2"
OpDecorate %frag_color Location 0
OpDecorate %_ptr_Output_v4f32 ArrayStride 16
OpDecorate %_arr_u32_u32_10 ArrayStride 4
OpMemberDecorate %Target_Cpu_Feature_Set 0 Offset 0
OpMemberDecorate %Target_Cpu_Model 0 Offset 0
OpMemberDecorate %Target_Cpu_Model 1 Offset 8
OpMemberDecorate %Target_Cpu_Model 2 Offset 16
OpMemberDecorate %Target_Cpu 0 Offset 0
OpMemberDecorate %Target_Cpu 1 Offset 4
OpMemberDecorate %Target_Cpu 2 Offset 8
OpDecorate %_arr_u8_u32_255 ArrayStride 1
OpMemberDecorate %Target_DynamicLinker 0 Offset 0
OpMemberDecorate %Target_DynamicLinker 1 Offset 255
OpDecorate %_arr_u8_u32_12 ArrayStride 1
%void = OpTypeVoid
%f32 = OpTypeFloat 32
%_ptr_Output_f32 = OpTypePointer Output %f32
%v4f32 = OpTypeVector %f32 4
%_ptr_Output_v4f32 = OpTypePointer Output %v4f32
%u32 = OpTypeInt 32 0
%u32_0 = OpConstant %u32 0
%f32_1 = OpConstant %f32 1
%u32_1 = OpConstant %u32 1
%u32_2 = OpConstant %u32 2
%u32_3 = OpConstant %u32 3
%24 = OpUndef %u32
%28 = OpUndef %u32
%_arr_u32_u32_2 = OpTypeArray %u32 %u32_2
%_ptr_Function__arr_u32_u32_2 = OpTypePointer Function %_arr_u32_u32_2
%u32_11 = OpConstant %u32 11
%u8 = OpTypeInt 8 0
%_ptr_Function_u8 = OpTypePointer Function %u8
%u8_1 = OpConstant %u8 1
%u8_2 = OpConstant %u8 2
%frag_color = OpVariable %_ptr_Output_v4f32 Output
%u32_10 = OpConstant %u32 10
%_arr_u32_u32_10 = OpTypeArray %u32 %u32_10
%Target_Cpu_Feature_Set = OpTypeStruct %_arr_u32_u32_10
%_ptr_Function_Target_Cpu_Feature_Set = OpTypePointer Function %Target_Cpu_Feature_Set
%_struct_57 = OpTypeStruct %_ptr_Function_u8 %u32
%Target_Cpu_Model = OpTypeStruct %_struct_57 %_struct_57 %Target_Cpu_Feature_Set
%_ptr_Function_Target_Cpu_Model = OpTypePointer Function %Target_Cpu_Model
%Target_Cpu = OpTypeStruct %u8 %_ptr_Function_Target_Cpu_Model %Target_Cpu_Feature_Set
%_ptr_Function_Target_Cpu = OpTypePointer Function %Target_Cpu
%u8_45 = OpConstant %u8 45
%u32_4032 = OpConstant %u32 4032
%u32_255 = OpConstant %u32 255
%_arr_u8_u32_255 = OpTypeArray %u8 %u32_255
%Target_DynamicLinker = OpTypeStruct %_arr_u8_u32_255 %u8
%_ptr_Function_Target_DynamicLinker = OpTypePointer Function %Target_DynamicLinker
%77 = OpUndef %_arr_u8_u32_255
%u8_0 = OpConstant %u8 0
%u32_12 = OpConstant %u32 12
%_arr_u8_u32_12 = OpTypeArray %u8 %u32_12
%_ptr_Function__arr_u8_u32_12 = OpTypePointer Function %_arr_u8_u32_12
%u8_118 = OpConstant %u8 118
%u8_117 = OpConstant %u8 117
%u8_108 = OpConstant %u8 108
%u8_107 = OpConstant %u8 107
%u8_97 = OpConstant %u8 97
%u8_110 = OpConstant %u8 110
%u8_95 = OpConstant %u8 95
%u8_49 = OpConstant %u8 49
%u8_50 = OpConstant %u8 50
%100 = OpConstantNull %_struct_57
%u32_2048 = OpConstant %u32 2048
%106 = OpTypeFunction %void
%107 = OpTypeFunction %void %_ptr_Function__arr_u32_u32_2
%109 = OpTypeFunction %void %_ptr_Function_u8
%112 = OpTypeFunction %void %_ptr_Function_Target_Cpu_Feature_Set
%114 = OpTypeFunction %void %_ptr_Function_Target_Cpu_Model %_ptr_Function_Target_Cpu
%117 = OpTypeFunction %void %_ptr_Function_Target_DynamicLinker
%119 = OpTypeFunction %void %_ptr_Function__arr_u8_u32_12
%121 = OpTypeFunction %void %_ptr_Function__arr_u8_u32_12 %_ptr_Function_Target_Cpu_Model
%shader_main = OpFunction %void None %106
%4 = OpLabel
OpLine %5 7 17
%6 = OpFunctionCall %void %gpu_location__anon_545
OpLine %5 8 5
%15 = OpInBoundsAccessChain %_ptr_Output_f32 %frag_color %u32_0
OpStore %15 %f32_1 None
%18 = OpInBoundsAccessChain %_ptr_Output_f32 %frag_color %u32_1
OpStore %18 %f32_1 None
%20 = OpInBoundsAccessChain %_ptr_Output_f32 %frag_color %u32_2
OpStore %20 %f32_1 None
%22 = OpInBoundsAccessChain %_ptr_Output_f32 %frag_color %u32_3
OpStore %22 %f32_1 None
OpReturn
%23 = OpLabel
OpUnreachable
OpFunctionEnd
%gpu_location__anon_545 = OpFunction %void None %106
%25 = OpLabel
OpLine %26 26 5
OpReturn
%27 = OpLabel
OpUnreachable
OpFunctionEnd
%initializer_of_builtin_zig_backend = OpFunction %void None %107
%108 = OpFunctionParameter %_ptr_Function__arr_u32_u32_2
%33 = OpLabel
%35 = OpCompositeConstruct %_arr_u32_u32_2 %u32_11 %u32_0
OpStore %108 %35
OpReturn
OpFunctionEnd
%initializer_of_start_simplified_logic = OpFunction %void None %109
%110 = OpFunctionParameter %_ptr_Function_u8
%41 = OpLabel
OpStore %110 %u8_1
OpReturn
OpFunctionEnd
%initializer_of_builtin_output_mode = OpFunction %void None %109
%111 = OpFunctionParameter %_ptr_Function_u8
%45 = OpLabel
OpStore %111 %u8_2
OpReturn
OpFunctionEnd
%initializer_of_Target_Cpu_Feature_Set_empty = OpFunction %void None %112
%113 = OpFunctionParameter %_ptr_Function_Target_Cpu_Feature_Set
%53 = OpLabel
%54 = OpCompositeConstruct %_arr_u32_u32_10 %u32_0 %u32_0 %u32_0 %u32_0 %u32_0 %u32_0 %u32_0 %u32_0 %u32_0 %u32_0
%55 = OpCompositeConstruct %Target_Cpu_Feature_Set %54
OpStore %113 %55
OpReturn
OpFunctionEnd
%initializer_of_builtin_cpu = OpFunction %void None %114
%115 = OpFunctionParameter %_ptr_Function_Target_Cpu_Model
%116 = OpFunctionParameter %_ptr_Function_Target_Cpu
%63 = OpLabel
%67 = OpCompositeConstruct %_arr_u32_u32_10 %u32_4032 %u32_0 %u32_0 %u32_0 %u32_0 %u32_0 %u32_0 %u32_0 %u32_0 %u32_0
%68 = OpCompositeConstruct %Target_Cpu_Feature_Set %67
%69 = OpCompositeConstruct %Target_Cpu %u8_45 %115 %68
OpStore %116 %69
OpReturn
OpFunctionEnd
%initializer_of_Target_DynamicLinker_none = OpFunction %void None %117
%118 = OpFunctionParameter %_ptr_Function_Target_DynamicLinker
%76 = OpLabel
%79 = OpCompositeConstruct %Target_DynamicLinker %77 %u8_0
OpStore %118 %79
OpReturn
OpFunctionEnd
%initializer_of___anon_1004 = OpFunction %void None %119
%120 = OpFunctionParameter %_ptr_Function__arr_u8_u32_12
%87 = OpLabel
%97 = OpCompositeConstruct %_arr_u8_u32_12 %u8_118 %u8_117 %u8_108 %u8_107 %u8_97 %u8_110 %u8_95 %u8_118 %u8_49 %u8_95 %u8_50 %u8_0
OpStore %120 %97
OpReturn
OpFunctionEnd
%initializer_of_Target_spirv_cpu_vulkan_v1_2 = OpFunction %void None %121
%122 = OpFunctionParameter %_ptr_Function__arr_u8_u32_12
%123 = OpFunctionParameter %_ptr_Function_Target_Cpu_Model
%81 = OpLabel
%98 = OpBitcast %_ptr_Function_u8 %122
%99 = OpCompositeConstruct %_struct_57 %98 %u32_11
%102 = OpCompositeConstruct %_arr_u32_u32_10 %u32_2048 %u32_0 %u32_0 %u32_0 %u32_0 %u32_0 %u32_0 %u32_0 %u32_0 %u32_0
%103 = OpCompositeConstruct %Target_Cpu_Feature_Set %102
%104 = OpCompositeConstruct %Target_Cpu_Model %99 %100 %103
OpStore %123 %104
OpReturn
OpFunctionEnd
%105 = OpFunction %void None %106
%124 = OpLabel
%125 = OpFunctionCall %void %shader_main
OpReturn
OpFunctionEnd

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@@ -5,6 +5,5 @@ extern var frag_color: @Vector(4, f32) addrspace(.output);
export fn main() callconv(.spirv_fragment) void {
gpu.location(&frag_color, 0);
frag_color = .{ 1.0, 1.0, 1.0, 1.0 };
}

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@@ -1,9 +0,0 @@
const Self = @This();
pub fn init() !Self {
return .{};
}
pub fn deinit(self: *const Self) void {
_ = self;
}

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@@ -1,14 +1,17 @@
const std = @import("std");
const builtin = @import("builtin");
const lib = @import("lib.zig");
const spv_data = @import("spv_data.zig");
const spv = @import("spv.zig");
const op = @import("opcodes.zig");
const SpvVoid = lib.SpvVoid;
const SpvByte = lib.SpvByte;
const SpvWord = lib.SpvWord;
const SpvBool = lib.SpvBool;
const spv = lib.spv;
const SpvVoid = spv.SpvVoid;
const SpvByte = spv.SpvByte;
const SpvWord = spv.SpvWord;
const SpvBool = spv.SpvBool;
const SpvMember = spv.SpvMember;
const SpvBinding = spv.SpvBinding;
const Interpreter = @import("Interpreter.zig");
const WordIterator = @import("WordIterator.zig");
const Self = @This();
@@ -24,11 +27,10 @@ const SpvEntryPoint = struct {
const ModuleError = error{
InvalidSpirV,
InvalidMagic,
UnsupportedEndianness,
OutOfMemory,
};
ctx: *const Interpreter,
it: WordIterator,
version_major: SpvByte,
@@ -51,20 +53,32 @@ local_size_x: SpvWord,
local_size_y: SpvWord,
local_size_z: SpvWord,
pub fn init(allocator: std.mem.Allocator, ctx: *const Interpreter, source: []const SpvWord) ModuleError!Self {
input_locations: std.AutoHashMap(SpvWord, *SpvMember),
output_locations: std.AutoHashMap(SpvWord, *SpvMember),
bindings: std.AutoHashMap(SpvBinding, *SpvMember),
push_constants: []SpvMember,
pub fn init(allocator: std.mem.Allocator, source: []const SpvWord) ModuleError!Self {
var self: Self = std.mem.zeroInit(Self, .{
.ctx = ctx,
.code = allocator.dupe(SpvWord, source) catch return ModuleError.OutOfMemory,
.local_size_x = 1,
.local_size_y = 1,
.local_size_z = 1,
.input_locations = std.AutoHashMap(SpvWord, *SpvMember).init(allocator),
.output_locations = std.AutoHashMap(SpvWord, *SpvMember).init(allocator),
.bindings = std.AutoHashMap(SpvBinding, *SpvMember).init(allocator),
});
errdefer allocator.free(self.code);
self.it = WordIterator.init(self.code);
const magic = self.it.next() orelse return ModuleError.InvalidSpirV;
if (magic != lib.spv.SpvMagicNumber) return ModuleError.InvalidMagic;
if (magic != spv.SpvMagicNumber) {
return ModuleError.InvalidMagic;
}
if (!checkEndiannessFromSpvMagic(magic)) {
return ModuleError.UnsupportedEndianness;
}
const version = self.it.next() orelse return ModuleError.InvalidSpirV;
self.version_major = @intCast((version & 0x00FF0000) >> 16);
@@ -78,14 +92,22 @@ pub fn init(allocator: std.mem.Allocator, ctx: *const Interpreter, source: []con
_ = self.it.skip(); // Skip schema
while (self.it.next()) |opcode| {
if (std.enums.fromInt(spv.SpvOp, opcode)) |spv_op| {
if (op.SetupDispatcher.get(spv_op)) |pfn| {
pfn(0, &self);
}
}
}
std.log.scoped(.SPIRV_Interpreter).debug(
\\Loaded shader module with infos:
\\ SPIR-V version: {d}.{d}
\\ Generator: {s} (ID {d}), encoded version {d}
\\ Generator: {s} (ID {d}), encoded version 0x{X}
, .{
self.version_major,
self.version_minor,
spv_data.vendorName(self.generator_id),
spv.vendorName(self.generator_id),
self.generator_id,
self.generator_version,
});
@@ -93,6 +115,20 @@ pub fn init(allocator: std.mem.Allocator, ctx: *const Interpreter, source: []con
return self;
}
pub fn deinit(self: *const Self, allocator: std.mem.Allocator) void {
allocator.free(self.code);
fn checkEndiannessFromSpvMagic(magic: SpvWord) bool {
const bytes: [4]u8 = @bitCast(magic);
if (0x03 == bytes[0] and 0x02 == bytes[1] and 0x23 == bytes[2] and 0x07 == bytes[3]) {
return builtin.cpu.arch.endian() == .little;
}
if (0x07 == bytes[0] and 0x23 == bytes[1] and 0x02 == bytes[2] and 0x03 == bytes[3]) {
return builtin.cpu.arch.endian() == .big;
}
return false;
}
pub fn deinit(self: *Self, allocator: std.mem.Allocator) void {
allocator.free(self.code);
self.input_locations.deinit();
self.output_locations.deinit();
self.bindings.deinit();
}

41
src/Runtime.zig git.filemode.normal_file
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@@ -0,0 +1,41 @@
const std = @import("std");
const spv = @import("spv.zig");
const SpvVoid = spv.SpvVoid;
const SpvByte = spv.SpvByte;
const SpvWord = spv.SpvWord;
const SpvBool = spv.SpvBool;
const Module = @import("Module.zig");
const WordIterator = @import("WordIterator.zig");
const Self = @This();
pub const CallError = error{
Unreachable,
Killed,
Error,
InitEnd,
ExecEnd,
};
module: *Module,
it: WordIterator,
stack_frames: std.SinglyLinkedList,
pub fn init(module: *Module) !Self {
return .{
.module = module,
.it = module.it,
.stack_frames = .{},
};
}
pub fn deinit(self: *const Self) void {
_ = self;
}
pub fn callEntryPoint(self: *Self, entry: SpvWord) CallError!void {
_ = self;
_ = entry;
}

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@@ -1,9 +0,0 @@
const std = @import("std");
const Interpreter = @import("Interpreter.zig");
const Module = @import("Module.zig");
const Self = @This();
ctx: *Interpreter,
owner: *Module,

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@@ -1,6 +1,6 @@
const lib = @import("lib.zig");
const spv = @import("spv.zig");
const SpvWord = lib.SpvWord;
const SpvWord = spv.SpvWord;
const Self = @This();

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@@ -1,24 +1,16 @@
const std = @import("std");
pub const spv = @cImport(@cInclude("spirv.h"));
pub const Image = @import("Image.zig");
pub const Interpreter = @import("Interpreter.zig");
pub const Module = @import("Module.zig");
pub const State = @import("State.zig");
pub const Runtime = @import("Runtime.zig");
const opcode = @import("opcode.zig");
const spv_data = @import("spv_data.zig");
pub const SpvVoid = void;
pub const SpvByte = u8;
pub const SpvWord = u32;
pub const SpvBool = bool;
const opcodes = @import("opcodes.zig");
const spv = @import("spv.zig");
test {
std.testing.refAllDecls(Image);
std.testing.refAllDecls(Interpreter);
std.testing.refAllDecls(Module);
std.testing.refAllDecls(State);
std.testing.refAllDecls(opcode);
std.testing.refAllDecls(spv_data);
std.testing.refAllDecls(Runtime);
std.testing.refAllDecls(opcodes);
std.testing.refAllDecls(spv);
}

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26
src/opcodes.zig git.filemode.normal_file
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@@ -0,0 +1,26 @@
const std = @import("std");
const spv = @import("spv.zig");
const Module = @import("Module.zig");
const Runtime = @import("Runtime.zig");
const SpvVoid = spv.SpvVoid;
const SpvByte = spv.SpvByte;
const SpvWord = spv.SpvWord;
const SpvBool = spv.SpvBool;
pub const OpCodeSetupFunc = *const fn (SpvWord, *Module) void;
pub const OpCodeExecFunc = *const fn (SpvWord, *Runtime) void;
pub const SetupDispatcher = block: {
@setEvalBranchQuota(65535);
break :block std.EnumMap(spv.SpvOp, OpCodeSetupFunc).init(.{
.Capability = OpCapability,
});
};
fn OpCapability(word_count: SpvWord, mod: *Module) void {
_ = word_count;
_ = mod;
std.debug.print("test\n", .{});
}

2593
src/spv.zig git.filemode.normal_file

File diff suppressed because it is too large Load Diff

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@@ -1,76 +0,0 @@
const lib = @import("lib.zig");
const spv = lib.spv;
pub const SourceLanguage = enum(u32) {
Unknown = 0,
ESSL = 1,
GLSL = 2,
OpenCL_C = 3,
OpenCL_CPP = 4,
HLSL = 5,
CPP_for_OpenCL = 6,
SYCL = 7,
HERO_C = 8,
NZSL = 9,
WGSL = 10,
Slang = 11,
Zig = 12,
Rust = 13,
};
pub fn vendorName(id: u32) []const u8 {
return switch (id) {
0 => "Khronos",
1 => "LunarG",
2 => "Valve",
3 => "Codeplay",
4 => "NVIDIA",
5 => "ARM",
6 => "Khronos LLVM/SPIR-V Translator",
7 => "Khronos SPIR-V Tools Assembler",
8 => "Khronos Glslang Reference Front End",
9 => "Qualcomm",
10 => "AMD",
11 => "Intel",
12 => "Imagination",
13 => "Google Shaderc over Glslang",
14 => "Google spiregg",
15 => "Google rspirv",
16 => "X-LEGEND Mesa-IR/SPIR-V Translator",
17 => "Khronos SPIR-V Tools Linker",
18 => "Wine VKD3D Shader Compiler",
19 => "Tellusim Clay Shader Compiler",
20 => "W3C WebGPU Group WHLSL Shader Translator",
21 => "Google Clspv",
22 => "LLVM MLIR SPIR-V Serializer",
23 => "Google Tint Compiler",
24 => "Google ANGLE Shader Compiler",
25 => "Netease Games Messiah Shader Compiler",
26 => "Xenia Xenia Emulator Microcode Translator",
27 => "Embark Studios Rust GPU Compiler Backend",
28 => "gfx-rs community Naga",
29 => "Mikkosoft Productions MSP Shader Compiler",
30 => "SpvGenTwo community SpvGenTwo SPIR-V IR Tools",
31 => "Google Skia SkSL",
32 => "TornadoVM Beehive SPIRV Toolkit",
33 => "DragonJoker ShaderWriter",
34 => "Rayan Hatout SPIRVSmith",
35 => "Saarland University Shady",
36 => "Taichi Graphics Taichi",
37 => "heroseh Hero C Compiler",
38 => "Meta SparkSL",
39 => "SirLynix Nazara ShaderLang Compiler",
40 => "Khronos Slang Compiler",
41 => "Zig Software Foundation Zig Compiler",
42 => "Rendong Liang spq",
43 => "LLVM LLVM SPIR-V Backend",
44 => "Robert Konrad Kongruent",
45 => "Kitsunebi Games Nuvk SPIR-V Emitter and DLSL compiler",
46 => "Nintendo",
47 => "ARM",
48 => "Goopax",
49 => "Icyllis Milica Arc3D Shader Compiler",
else => "Unknown",
};
}