working on opcodes
This commit is contained in:
18
build.zig
18
build.zig
@@ -31,24 +31,6 @@ pub fn build(b: *std.Build) void {
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}),
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}),
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});
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});
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const spirv_target = b.resolveTargetQuery(.{
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.cpu_arch = .spirv32,
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.cpu_model = .{ .explicit = &std.Target.spirv.cpu.vulkan_v1_2 },
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.os_tag = .vulkan,
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.ofmt = .spirv,
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});
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const shader = b.addObject(.{
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.name = "shader.zig",
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.root_module = b.createModule(.{
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.root_source_file = b.path("example/shader.zig"),
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.target = spirv_target,
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}),
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.use_llvm = false,
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});
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example_exe.root_module.addAnonymousImport("shader", .{ .root_source_file = shader.getEmittedBin() });
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const example_install = b.addInstallArtifact(example_exe, .{});
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const example_install = b.addInstallArtifact(example_exe, .{});
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example_install.step.dependOn(&lib_install.step);
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example_install.step.dependOn(&lib_install.step);
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@@ -1,7 +1,7 @@
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const std = @import("std");
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const std = @import("std");
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const spv = @import("spv");
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const spv = @import("spv");
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const shader_source = @embedFile("shader");
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const shader_source = @embedFile("shader.spv");
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pub fn main() !void {
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pub fn main() !void {
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{
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{
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15
example/shader.nzsl
git.filemode.normal_file
15
example/shader.nzsl
git.filemode.normal_file
@@ -0,0 +1,15 @@
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[nzsl_version("1.1")]
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module;
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struct FragOut
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{
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[location(0)] color: vec4[f32]
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}
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[entry(frag)]
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fn main() -> FragOut
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{
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let output: FragOut;
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output.color = vec4[f32](1.0, 1.0, 1.0, 1.0);
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return output;
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}
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BIN
example/shader.spv
git.filemode.normal_file
BIN
example/shader.spv
git.filemode.normal_file
Binary file not shown.
@@ -1,242 +1,40 @@
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; SPIR-V
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; SPIR-V
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; Version: 1.5
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; Version: 1.0
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; Generator: Zig Software Foundation Zig Compiler; 2048
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; Generator: SirLynix Nazara ShaderLang Compiler; 4226
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; Bound: 126
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; Bound: 20
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; Schema: 0
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; Schema: 0
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OpCapability Shader
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OpCapability Shader
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OpCapability Matrix
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OpCapability Int8
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OpCapability Int16
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OpMemoryModel Logical GLSL450
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OpMemoryModel Logical GLSL450
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OpEntryPoint Fragment %105 "main" %frag_color
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OpEntryPoint Fragment %main "main" %color
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OpExecutionMode %105 OriginUpperLeft
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OpExecutionMode %main OriginUpperLeft
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%5 = OpString "shader.zig"
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OpSource NZSL 4198400
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%26 = OpString "gpu.zig"
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OpSourceExtension "Version: 1.1"
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OpSourceExtension "zig_errors:"
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OpName %FragOut "FragOut"
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OpSource Zig 2048
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OpMemberName %FragOut 0 "color"
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OpName %void "void"
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OpName %color "color"
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OpName %f32 "f32"
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OpName %main "main"
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OpName %u32 "u32"
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OpDecorate %color Location 0
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OpName %shader_main "shader.main"
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OpMemberDecorate %FragOut 0 Offset 0
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OpName %gpu_location__anon_545 "gpu.location__anon_545"
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OpName %initializer_of_builtin_zig_backend "initializer of builtin.zig_backend"
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OpName %u8 "u8"
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OpName %initializer_of_start_simplified_logic "initializer of start.simplified_logic"
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OpName %initializer_of_builtin_output_mode "initializer of builtin.output_mode"
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OpName %frag_color "frag_color"
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OpMemberName %Target_Cpu_Feature_Set 0 "ints"
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OpName %Target_Cpu_Feature_Set "Target.Cpu.Feature.Set"
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OpName %Target_Cpu_Feature_Set "Target.Cpu.Feature.Set"
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OpName %Target_Cpu_Feature_Set "Target.Cpu.Feature.Set"
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OpName %initializer_of_Target_Cpu_Feature_Set_empty "initializer of Target.Cpu.Feature.Set.empty"
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OpMemberName %_struct_57 0 "ptr"
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OpMemberName %_struct_57 1 "len"
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OpName %Target_Cpu_Feature_Set "Target.Cpu.Feature.Set"
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OpMemberName %Target_Cpu_Model 0 "name"
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OpMemberName %Target_Cpu_Model 1 "llvm_name"
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OpMemberName %Target_Cpu_Model 2 "features"
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OpName %Target_Cpu_Model "Target.Cpu.Model"
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OpName %Target_Cpu_Feature_Set "Target.Cpu.Feature.Set"
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OpMemberName %Target_Cpu 0 "arch"
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OpMemberName %Target_Cpu 1 "model"
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OpMemberName %Target_Cpu 2 "features"
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OpName %Target_Cpu "Target.Cpu"
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OpName %Target_Cpu_Feature_Set "Target.Cpu.Feature.Set"
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OpName %Target_Cpu_Model "Target.Cpu.Model"
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OpName %Target_Cpu_Feature_Set "Target.Cpu.Feature.Set"
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OpName %Target_Cpu "Target.Cpu"
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OpName %Target_Cpu_Feature_Set "Target.Cpu.Feature.Set"
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OpName %Target_Cpu_Model "Target.Cpu.Model"
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OpName %Target_Cpu_Feature_Set "Target.Cpu.Feature.Set"
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OpName %Target_Cpu_Model "Target.Cpu.Model"
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OpName %Target_Cpu_Feature_Set "Target.Cpu.Feature.Set"
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OpName %Target_Cpu_Model "Target.Cpu.Model"
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OpName %Target_Cpu_Feature_Set "Target.Cpu.Feature.Set"
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OpName %Target_Cpu_Feature_Set "Target.Cpu.Feature.Set"
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OpName %Target_Cpu_Feature_Set "Target.Cpu.Feature.Set"
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OpName %Target_Cpu_Model "Target.Cpu.Model"
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OpName %Target_Cpu_Feature_Set "Target.Cpu.Feature.Set"
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OpName %Target_Cpu "Target.Cpu"
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OpName %initializer_of_builtin_cpu "initializer of builtin.cpu"
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OpMemberName %Target_DynamicLinker 0 "buffer"
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OpMemberName %Target_DynamicLinker 1 "len"
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OpName %Target_DynamicLinker "Target.DynamicLinker"
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OpName %Target_DynamicLinker "Target.DynamicLinker"
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OpName %Target_DynamicLinker "Target.DynamicLinker"
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OpName %initializer_of_Target_DynamicLinker_none "initializer of Target.DynamicLinker.none"
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OpName %Target_Cpu_Feature_Set "Target.Cpu.Feature.Set"
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OpName %Target_Cpu_Model "Target.Cpu.Model"
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OpName %Target_Cpu_Feature_Set "Target.Cpu.Feature.Set"
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OpName %Target_Cpu_Model "Target.Cpu.Model"
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OpName %initializer_of___anon_1004 "initializer of __anon_1004"
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OpName %Target_Cpu_Feature_Set "Target.Cpu.Feature.Set"
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OpName %Target_Cpu_Feature_Set "Target.Cpu.Feature.Set"
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OpName %Target_Cpu_Feature_Set "Target.Cpu.Feature.Set"
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OpName %Target_Cpu_Model "Target.Cpu.Model"
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OpName %initializer_of_Target_spirv_cpu_vulkan_v1_2 "initializer of Target.spirv.cpu.vulkan_v1_2"
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OpDecorate %frag_color Location 0
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OpDecorate %_ptr_Output_v4f32 ArrayStride 16
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OpDecorate %_arr_u32_u32_10 ArrayStride 4
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OpMemberDecorate %Target_Cpu_Feature_Set 0 Offset 0
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OpMemberDecorate %Target_Cpu_Model 0 Offset 0
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OpMemberDecorate %Target_Cpu_Model 1 Offset 8
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OpMemberDecorate %Target_Cpu_Model 2 Offset 16
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OpMemberDecorate %Target_Cpu 0 Offset 0
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OpMemberDecorate %Target_Cpu 1 Offset 4
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OpMemberDecorate %Target_Cpu 2 Offset 8
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OpDecorate %_arr_u8_u32_255 ArrayStride 1
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OpMemberDecorate %Target_DynamicLinker 0 Offset 0
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OpMemberDecorate %Target_DynamicLinker 1 Offset 255
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OpDecorate %_arr_u8_u32_12 ArrayStride 1
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%void = OpTypeVoid
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%void = OpTypeVoid
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%f32 = OpTypeFloat 32
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%2 = OpTypeFunction %void
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%_ptr_Output_f32 = OpTypePointer Output %f32
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%float = OpTypeFloat 32
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%v4f32 = OpTypeVector %f32 4
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%v4float = OpTypeVector %float 4
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%_ptr_Output_v4f32 = OpTypePointer Output %v4f32
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%_ptr_Output_v4float = OpTypePointer Output %v4float
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%u32 = OpTypeInt 32 0
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%FragOut = OpTypeStruct %v4float
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%u32_0 = OpConstant %u32 0
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%_ptr_Function_FragOut = OpTypePointer Function %FragOut
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%f32_1 = OpConstant %f32 1
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%int = OpTypeInt 32 1
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%u32_1 = OpConstant %u32 1
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%int_0 = OpConstant %int 0
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%u32_2 = OpConstant %u32 2
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%float_1 = OpConstant %float 1
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%u32_3 = OpConstant %u32 3
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%_ptr_Function_v4float = OpTypePointer Function %v4float
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%24 = OpUndef %u32
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%color = OpVariable %_ptr_Output_v4float Output
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%28 = OpUndef %u32
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%main = OpFunction %void None %2
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%_arr_u32_u32_2 = OpTypeArray %u32 %u32_2
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%13 = OpLabel
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%_ptr_Function__arr_u32_u32_2 = OpTypePointer Function %_arr_u32_u32_2
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%14 = OpVariable %_ptr_Function_FragOut Function
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%u32_11 = OpConstant %u32 11
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%15 = OpCompositeConstruct %v4float %float_1 %float_1 %float_1 %float_1
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%u8 = OpTypeInt 8 0
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%16 = OpAccessChain %_ptr_Function_v4float %14 %int_0
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%_ptr_Function_u8 = OpTypePointer Function %u8
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OpStore %16 %15
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%u8_1 = OpConstant %u8 1
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%18 = OpLoad %FragOut %14
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%u8_2 = OpConstant %u8 2
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%19 = OpCompositeExtract %v4float %18 0
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%frag_color = OpVariable %_ptr_Output_v4f32 Output
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OpStore %color %19
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%u32_10 = OpConstant %u32 10
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%_arr_u32_u32_10 = OpTypeArray %u32 %u32_10
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%Target_Cpu_Feature_Set = OpTypeStruct %_arr_u32_u32_10
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%_ptr_Function_Target_Cpu_Feature_Set = OpTypePointer Function %Target_Cpu_Feature_Set
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%_struct_57 = OpTypeStruct %_ptr_Function_u8 %u32
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%Target_Cpu_Model = OpTypeStruct %_struct_57 %_struct_57 %Target_Cpu_Feature_Set
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%_ptr_Function_Target_Cpu_Model = OpTypePointer Function %Target_Cpu_Model
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%Target_Cpu = OpTypeStruct %u8 %_ptr_Function_Target_Cpu_Model %Target_Cpu_Feature_Set
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%_ptr_Function_Target_Cpu = OpTypePointer Function %Target_Cpu
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%u8_45 = OpConstant %u8 45
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%u32_4032 = OpConstant %u32 4032
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%u32_255 = OpConstant %u32 255
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%_arr_u8_u32_255 = OpTypeArray %u8 %u32_255
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%Target_DynamicLinker = OpTypeStruct %_arr_u8_u32_255 %u8
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%_ptr_Function_Target_DynamicLinker = OpTypePointer Function %Target_DynamicLinker
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%77 = OpUndef %_arr_u8_u32_255
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%u8_0 = OpConstant %u8 0
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%u32_12 = OpConstant %u32 12
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%_arr_u8_u32_12 = OpTypeArray %u8 %u32_12
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%_ptr_Function__arr_u8_u32_12 = OpTypePointer Function %_arr_u8_u32_12
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%u8_118 = OpConstant %u8 118
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%u8_117 = OpConstant %u8 117
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%u8_108 = OpConstant %u8 108
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%u8_107 = OpConstant %u8 107
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%u8_97 = OpConstant %u8 97
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%u8_110 = OpConstant %u8 110
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%u8_95 = OpConstant %u8 95
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%u8_49 = OpConstant %u8 49
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%u8_50 = OpConstant %u8 50
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%100 = OpConstantNull %_struct_57
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%u32_2048 = OpConstant %u32 2048
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%106 = OpTypeFunction %void
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%107 = OpTypeFunction %void %_ptr_Function__arr_u32_u32_2
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%109 = OpTypeFunction %void %_ptr_Function_u8
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%112 = OpTypeFunction %void %_ptr_Function_Target_Cpu_Feature_Set
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%114 = OpTypeFunction %void %_ptr_Function_Target_Cpu_Model %_ptr_Function_Target_Cpu
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%117 = OpTypeFunction %void %_ptr_Function_Target_DynamicLinker
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%119 = OpTypeFunction %void %_ptr_Function__arr_u8_u32_12
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%121 = OpTypeFunction %void %_ptr_Function__arr_u8_u32_12 %_ptr_Function_Target_Cpu_Model
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%shader_main = OpFunction %void None %106
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%4 = OpLabel
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OpLine %5 7 17
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%6 = OpFunctionCall %void %gpu_location__anon_545
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OpLine %5 8 5
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%15 = OpInBoundsAccessChain %_ptr_Output_f32 %frag_color %u32_0
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OpStore %15 %f32_1 None
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%18 = OpInBoundsAccessChain %_ptr_Output_f32 %frag_color %u32_1
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OpStore %18 %f32_1 None
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%20 = OpInBoundsAccessChain %_ptr_Output_f32 %frag_color %u32_2
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OpStore %20 %f32_1 None
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%22 = OpInBoundsAccessChain %_ptr_Output_f32 %frag_color %u32_3
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OpStore %22 %f32_1 None
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OpReturn
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%23 = OpLabel
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|
||||||
OpUnreachable
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|
||||||
OpFunctionEnd
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|
||||||
%gpu_location__anon_545 = OpFunction %void None %106
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%25 = OpLabel
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OpLine %26 26 5
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OpReturn
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|
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%27 = OpLabel
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|
||||||
OpUnreachable
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|
||||||
OpFunctionEnd
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|
||||||
%initializer_of_builtin_zig_backend = OpFunction %void None %107
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|
||||||
%108 = OpFunctionParameter %_ptr_Function__arr_u32_u32_2
|
|
||||||
%33 = OpLabel
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||||||
%35 = OpCompositeConstruct %_arr_u32_u32_2 %u32_11 %u32_0
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|
||||||
OpStore %108 %35
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|
||||||
OpReturn
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|
||||||
OpFunctionEnd
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|
||||||
%initializer_of_start_simplified_logic = OpFunction %void None %109
|
|
||||||
%110 = OpFunctionParameter %_ptr_Function_u8
|
|
||||||
%41 = OpLabel
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|
||||||
OpStore %110 %u8_1
|
|
||||||
OpReturn
|
|
||||||
OpFunctionEnd
|
|
||||||
%initializer_of_builtin_output_mode = OpFunction %void None %109
|
|
||||||
%111 = OpFunctionParameter %_ptr_Function_u8
|
|
||||||
%45 = OpLabel
|
|
||||||
OpStore %111 %u8_2
|
|
||||||
OpReturn
|
|
||||||
OpFunctionEnd
|
|
||||||
%initializer_of_Target_Cpu_Feature_Set_empty = OpFunction %void None %112
|
|
||||||
%113 = OpFunctionParameter %_ptr_Function_Target_Cpu_Feature_Set
|
|
||||||
%53 = OpLabel
|
|
||||||
%54 = OpCompositeConstruct %_arr_u32_u32_10 %u32_0 %u32_0 %u32_0 %u32_0 %u32_0 %u32_0 %u32_0 %u32_0 %u32_0 %u32_0
|
|
||||||
%55 = OpCompositeConstruct %Target_Cpu_Feature_Set %54
|
|
||||||
OpStore %113 %55
|
|
||||||
OpReturn
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|
||||||
OpFunctionEnd
|
|
||||||
%initializer_of_builtin_cpu = OpFunction %void None %114
|
|
||||||
%115 = OpFunctionParameter %_ptr_Function_Target_Cpu_Model
|
|
||||||
%116 = OpFunctionParameter %_ptr_Function_Target_Cpu
|
|
||||||
%63 = OpLabel
|
|
||||||
%67 = OpCompositeConstruct %_arr_u32_u32_10 %u32_4032 %u32_0 %u32_0 %u32_0 %u32_0 %u32_0 %u32_0 %u32_0 %u32_0 %u32_0
|
|
||||||
%68 = OpCompositeConstruct %Target_Cpu_Feature_Set %67
|
|
||||||
%69 = OpCompositeConstruct %Target_Cpu %u8_45 %115 %68
|
|
||||||
OpStore %116 %69
|
|
||||||
OpReturn
|
|
||||||
OpFunctionEnd
|
|
||||||
%initializer_of_Target_DynamicLinker_none = OpFunction %void None %117
|
|
||||||
%118 = OpFunctionParameter %_ptr_Function_Target_DynamicLinker
|
|
||||||
%76 = OpLabel
|
|
||||||
%79 = OpCompositeConstruct %Target_DynamicLinker %77 %u8_0
|
|
||||||
OpStore %118 %79
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|
||||||
OpReturn
|
|
||||||
OpFunctionEnd
|
|
||||||
%initializer_of___anon_1004 = OpFunction %void None %119
|
|
||||||
%120 = OpFunctionParameter %_ptr_Function__arr_u8_u32_12
|
|
||||||
%87 = OpLabel
|
|
||||||
%97 = OpCompositeConstruct %_arr_u8_u32_12 %u8_118 %u8_117 %u8_108 %u8_107 %u8_97 %u8_110 %u8_95 %u8_118 %u8_49 %u8_95 %u8_50 %u8_0
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|
||||||
OpStore %120 %97
|
|
||||||
OpReturn
|
|
||||||
OpFunctionEnd
|
|
||||||
%initializer_of_Target_spirv_cpu_vulkan_v1_2 = OpFunction %void None %121
|
|
||||||
%122 = OpFunctionParameter %_ptr_Function__arr_u8_u32_12
|
|
||||||
%123 = OpFunctionParameter %_ptr_Function_Target_Cpu_Model
|
|
||||||
%81 = OpLabel
|
|
||||||
%98 = OpBitcast %_ptr_Function_u8 %122
|
|
||||||
%99 = OpCompositeConstruct %_struct_57 %98 %u32_11
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|
||||||
%102 = OpCompositeConstruct %_arr_u32_u32_10 %u32_2048 %u32_0 %u32_0 %u32_0 %u32_0 %u32_0 %u32_0 %u32_0 %u32_0 %u32_0
|
|
||||||
%103 = OpCompositeConstruct %Target_Cpu_Feature_Set %102
|
|
||||||
%104 = OpCompositeConstruct %Target_Cpu_Model %99 %100 %103
|
|
||||||
OpStore %123 %104
|
|
||||||
OpReturn
|
|
||||||
OpFunctionEnd
|
|
||||||
%105 = OpFunction %void None %106
|
|
||||||
%124 = OpLabel
|
|
||||||
%125 = OpFunctionCall %void %shader_main
|
|
||||||
OpReturn
|
OpReturn
|
||||||
OpFunctionEnd
|
OpFunctionEnd
|
||||||
|
|||||||
@@ -1,9 +0,0 @@
|
|||||||
const std = @import("std");
|
|
||||||
const gpu = std.gpu;
|
|
||||||
|
|
||||||
extern var frag_color: @Vector(4, f32) addrspace(.output);
|
|
||||||
|
|
||||||
export fn main() callconv(.spirv_fragment) void {
|
|
||||||
gpu.location(&frag_color, 0);
|
|
||||||
frag_color = .{ 1.0, 1.0, 1.0, 1.0 };
|
|
||||||
}
|
|
||||||
@@ -20,8 +20,7 @@ const SpvEntryPoint = struct {
|
|||||||
exec_model: spv.SpvExecutionModel,
|
exec_model: spv.SpvExecutionModel,
|
||||||
id: SpvWord,
|
id: SpvWord,
|
||||||
name: []const u8,
|
name: []const u8,
|
||||||
globals_count: SpvWord,
|
globals: []SpvWord,
|
||||||
globals: []const SpvWord,
|
|
||||||
};
|
};
|
||||||
|
|
||||||
const ModuleError = error{
|
const ModuleError = error{
|
||||||
@@ -46,8 +45,8 @@ code: []const SpvWord,
|
|||||||
addressing: spv.SpvAddressingModel,
|
addressing: spv.SpvAddressingModel,
|
||||||
memory_model: spv.SpvMemoryModel,
|
memory_model: spv.SpvMemoryModel,
|
||||||
|
|
||||||
entry_point_count: SpvWord,
|
entry_points: std.ArrayList(SpvEntryPoint),
|
||||||
entry_points: []const SpvEntryPoint,
|
capabilities: std.EnumSet(spv.SpvCapability),
|
||||||
|
|
||||||
local_size_x: SpvWord,
|
local_size_x: SpvWord,
|
||||||
local_size_y: SpvWord,
|
local_size_y: SpvWord,
|
||||||
@@ -61,6 +60,8 @@ push_constants: []SpvMember,
|
|||||||
pub fn init(allocator: std.mem.Allocator, source: []const SpvWord) ModuleError!Self {
|
pub fn init(allocator: std.mem.Allocator, source: []const SpvWord) ModuleError!Self {
|
||||||
var self: Self = std.mem.zeroInit(Self, .{
|
var self: Self = std.mem.zeroInit(Self, .{
|
||||||
.code = allocator.dupe(SpvWord, source) catch return ModuleError.OutOfMemory,
|
.code = allocator.dupe(SpvWord, source) catch return ModuleError.OutOfMemory,
|
||||||
|
.entry_points = std.ArrayList(SpvEntryPoint).empty,
|
||||||
|
.capabilities = std.EnumSet(spv.SpvCapability).initEmpty(),
|
||||||
.local_size_x = 1,
|
.local_size_x = 1,
|
||||||
.local_size_y = 1,
|
.local_size_y = 1,
|
||||||
.local_size_z = 1,
|
.local_size_z = 1,
|
||||||
@@ -92,24 +93,36 @@ pub fn init(allocator: std.mem.Allocator, source: []const SpvWord) ModuleError!S
|
|||||||
|
|
||||||
_ = self.it.skip(); // Skip schema
|
_ = self.it.skip(); // Skip schema
|
||||||
|
|
||||||
while (self.it.next()) |opcode| {
|
const it_save = self.it;
|
||||||
|
while (self.it.next()) |opcode_data| {
|
||||||
|
const word_count = ((opcode_data & (~spv.SpvOpCodeMask)) >> spv.SpvWordCountShift) - 1;
|
||||||
|
const opcode = (opcode_data & spv.SpvOpCodeMask);
|
||||||
|
|
||||||
|
var it_tmp = self.it; // Save because operations may iter on this iterator
|
||||||
if (std.enums.fromInt(spv.SpvOp, opcode)) |spv_op| {
|
if (std.enums.fromInt(spv.SpvOp, opcode)) |spv_op| {
|
||||||
if (op.SetupDispatcher.get(spv_op)) |pfn| {
|
if (op.SetupDispatcher.get(spv_op)) |pfn| {
|
||||||
pfn(0, &self);
|
pfn(allocator, word_count, &self) catch {};
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
_ = it_tmp.skipN(word_count);
|
||||||
|
self.it = it_tmp;
|
||||||
}
|
}
|
||||||
|
self.it = it_save;
|
||||||
|
|
||||||
std.log.scoped(.SPIRV_Interpreter).debug(
|
std.log.scoped(.SPIRV_Interpreter).debug(
|
||||||
\\Loaded shader module with infos:
|
\\Loaded shader module with infos:
|
||||||
\\ SPIR-V version: {d}.{d}
|
\\ SPIR-V version: {d}.{d}
|
||||||
\\ Generator: {s} (ID {d}), encoded version 0x{X}
|
\\ Generator: {s} (ID {d}), encoded version 0x{X}
|
||||||
|
\\ Capabilities count: {d}
|
||||||
|
\\ Entry points count: {d}
|
||||||
, .{
|
, .{
|
||||||
self.version_major,
|
self.version_major,
|
||||||
self.version_minor,
|
self.version_minor,
|
||||||
spv.vendorName(self.generator_id),
|
spv.vendorName(self.generator_id),
|
||||||
self.generator_id,
|
self.generator_id,
|
||||||
self.generator_version,
|
self.generator_version,
|
||||||
|
self.capabilities.count(),
|
||||||
|
self.entry_points.items.len,
|
||||||
});
|
});
|
||||||
|
|
||||||
return self;
|
return self;
|
||||||
@@ -131,4 +144,9 @@ pub fn deinit(self: *Self, allocator: std.mem.Allocator) void {
|
|||||||
self.input_locations.deinit();
|
self.input_locations.deinit();
|
||||||
self.output_locations.deinit();
|
self.output_locations.deinit();
|
||||||
self.bindings.deinit();
|
self.bindings.deinit();
|
||||||
|
for (self.entry_points.items) |entry| {
|
||||||
|
allocator.free(entry.name);
|
||||||
|
allocator.free(entry.globals);
|
||||||
|
}
|
||||||
|
self.entry_points.deinit(allocator);
|
||||||
}
|
}
|
||||||
|
|||||||
@@ -31,3 +31,11 @@ pub fn skip(self: *Self) bool {
|
|||||||
self.index += 1;
|
self.index += 1;
|
||||||
return true;
|
return true;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
pub fn skipN(self: *Self, count: usize) bool {
|
||||||
|
if (self.index >= self.buffer.len) {
|
||||||
|
return false;
|
||||||
|
}
|
||||||
|
self.index += count;
|
||||||
|
return true;
|
||||||
|
}
|
||||||
|
|||||||
@@ -3,24 +3,58 @@ const spv = @import("spv.zig");
|
|||||||
|
|
||||||
const Module = @import("Module.zig");
|
const Module = @import("Module.zig");
|
||||||
const Runtime = @import("Runtime.zig");
|
const Runtime = @import("Runtime.zig");
|
||||||
|
const WordIterator = @import("WordIterator.zig");
|
||||||
|
|
||||||
const SpvVoid = spv.SpvVoid;
|
const SpvVoid = spv.SpvVoid;
|
||||||
const SpvByte = spv.SpvByte;
|
const SpvByte = spv.SpvByte;
|
||||||
const SpvWord = spv.SpvWord;
|
const SpvWord = spv.SpvWord;
|
||||||
const SpvBool = spv.SpvBool;
|
const SpvBool = spv.SpvBool;
|
||||||
|
|
||||||
pub const OpCodeSetupFunc = *const fn (SpvWord, *Module) void;
|
pub const OpCodeSetupFunc = *const fn (std.mem.Allocator, SpvWord, *Module) anyerror!void;
|
||||||
pub const OpCodeExecFunc = *const fn (SpvWord, *Runtime) void;
|
pub const OpCodeExecFunc = *const fn (std.mem.Allocator, SpvWord, *Runtime) anyerror!void;
|
||||||
|
|
||||||
pub const SetupDispatcher = block: {
|
pub const SetupDispatcher = block: {
|
||||||
@setEvalBranchQuota(65535);
|
@setEvalBranchQuota(65535);
|
||||||
break :block std.EnumMap(spv.SpvOp, OpCodeSetupFunc).init(.{
|
break :block std.EnumMap(spv.SpvOp, OpCodeSetupFunc).init(.{
|
||||||
.Capability = OpCapability,
|
.Capability = opCapability,
|
||||||
|
.EntryPoint = opEntryPoint,
|
||||||
});
|
});
|
||||||
};
|
};
|
||||||
|
|
||||||
fn OpCapability(word_count: SpvWord, mod: *Module) void {
|
fn opCapability(_: std.mem.Allocator, _: SpvWord, mod: *Module) !void {
|
||||||
_ = word_count;
|
if (std.enums.fromInt(spv.SpvCapability, mod.it.next() orelse return)) |capability| {
|
||||||
_ = mod;
|
mod.capabilities.insert(capability);
|
||||||
std.debug.print("test\n", .{});
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
fn opEntryPoint(allocator: std.mem.Allocator, word_count: SpvWord, mod: *Module) !void {
|
||||||
|
const entry = try mod.entry_points.addOne(allocator);
|
||||||
|
entry.exec_model = std.enums.fromInt(spv.SpvExecutionModel, mod.it.next() orelse return) orelse return;
|
||||||
|
entry.id = mod.it.next() orelse return;
|
||||||
|
entry.name = try readString(allocator, &mod.it);
|
||||||
|
|
||||||
|
var interface_count = word_count - @divExact(entry.name.len, 4) - 2;
|
||||||
|
if (interface_count != 0) {
|
||||||
|
entry.globals = try allocator.alloc(SpvWord, interface_count);
|
||||||
|
var interface_index: u32 = 0;
|
||||||
|
while (interface_count != 0) {
|
||||||
|
entry.globals[interface_index] = mod.it.next() orelse return;
|
||||||
|
interface_index += 1;
|
||||||
|
interface_count -= 1;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
fn readString(allocator: std.mem.Allocator, it: *WordIterator) ![]const u8 {
|
||||||
|
var str: std.ArrayList(u8) = .empty;
|
||||||
|
while (it.next()) |word| {
|
||||||
|
(try str.addOne(allocator)).* = @truncate(word & 0x000000FF);
|
||||||
|
(try str.addOne(allocator)).* = @truncate((word & 0x0000FF00) >> 8);
|
||||||
|
(try str.addOne(allocator)).* = @truncate((word & 0x00FF0000) >> 16);
|
||||||
|
(try str.addOne(allocator)).* = @truncate((word & 0xFF000000) >> 24);
|
||||||
|
if (str.getLast() == 0) {
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
return str.toOwnedSlice(allocator);
|
||||||
}
|
}
|
||||||
|
|||||||
272
src/spv.zig
272
src/spv.zig
@@ -5,11 +5,11 @@ pub const SpvByte = u8;
|
|||||||
pub const SpvWord = u32;
|
pub const SpvWord = u32;
|
||||||
pub const SpvBool = bool;
|
pub const SpvBool = bool;
|
||||||
|
|
||||||
pub const SpvMagicNumber = 0x07230203;
|
pub const SpvMagicNumber: u32 = 0x07230203;
|
||||||
pub const SpvVersion = 0x00010600;
|
pub const SpvVersion: u32 = 0x00010600;
|
||||||
pub const SpvRevision = 1;
|
pub const SpvRevision: u32 = 1;
|
||||||
pub const SpvOpCodeMask = 0xffff;
|
pub const SpvOpCodeMask: u32 = 0xffff;
|
||||||
pub const SpvWordCountShift = 16;
|
pub const SpvWordCountShift: u32 = 16;
|
||||||
|
|
||||||
pub fn vendorName(id: u32) []const u8 {
|
pub fn vendorName(id: u32) []const u8 {
|
||||||
return switch (id) {
|
return switch (id) {
|
||||||
@@ -210,16 +210,11 @@ pub const SpvExecutionMode = enum(u32) {
|
|||||||
QuadDerivativesKHR = 5088,
|
QuadDerivativesKHR = 5088,
|
||||||
RequireFullQuadsKHR = 5089,
|
RequireFullQuadsKHR = 5089,
|
||||||
SharesInputWithAMDX = 5102,
|
SharesInputWithAMDX = 5102,
|
||||||
OutputLinesEXT = 5269,
|
OutputLines = 5269,
|
||||||
OutputLinesNV = 5269,
|
OutputPrimitives = 5270,
|
||||||
OutputPrimitivesEXT = 5270,
|
DerivativeGroupQuads = 5289,
|
||||||
OutputPrimitivesNV = 5270,
|
DerivativeGroupLinear = 5290,
|
||||||
DerivativeGroupQuadsKHR = 5289,
|
OutputTriangles = 5298,
|
||||||
DerivativeGroupQuadsNV = 5289,
|
|
||||||
DerivativeGroupLinearKHR = 5290,
|
|
||||||
DerivativeGroupLinearNV = 5290,
|
|
||||||
OutputTrianglesEXT = 5298,
|
|
||||||
OutputTrianglesNV = 5298,
|
|
||||||
PixelInterlockOrderedEXT = 5366,
|
PixelInterlockOrderedEXT = 5366,
|
||||||
PixelInterlockUnorderedEXT = 5367,
|
PixelInterlockUnorderedEXT = 5367,
|
||||||
SampleInterlockOrderedEXT = 5368,
|
SampleInterlockOrderedEXT = 5368,
|
||||||
@@ -265,28 +260,19 @@ pub const SpvStorageClass = enum(u32) {
|
|||||||
TileImageEXT = 4172,
|
TileImageEXT = 4172,
|
||||||
TileAttachmentQCOM = 4491,
|
TileAttachmentQCOM = 4491,
|
||||||
NodePayloadAMDX = 5068,
|
NodePayloadAMDX = 5068,
|
||||||
CallableDataKHR = 5328,
|
CallableData = 5328,
|
||||||
CallableDataNV = 5328,
|
IncomingCallableData = 5329,
|
||||||
IncomingCallableDataKHR = 5329,
|
RayPayload = 5338,
|
||||||
IncomingCallableDataNV = 5329,
|
HitAttribute = 5339,
|
||||||
RayPayloadKHR = 5338,
|
IncomingRayPayload = 5342,
|
||||||
RayPayloadNV = 5338,
|
ShaderRecordBuffer = 5343,
|
||||||
HitAttributeKHR = 5339,
|
|
||||||
HitAttributeNV = 5339,
|
|
||||||
IncomingRayPayloadKHR = 5342,
|
|
||||||
IncomingRayPayloadNV = 5342,
|
|
||||||
ShaderRecordBufferKHR = 5343,
|
|
||||||
ShaderRecordBufferNV = 5343,
|
|
||||||
PhysicalStorageBuffer = 5349,
|
PhysicalStorageBuffer = 5349,
|
||||||
PhysicalStorageBufferEXT = 5349,
|
|
||||||
HitObjectAttributeNV = 5385,
|
HitObjectAttributeNV = 5385,
|
||||||
TaskPayloadWorkgroupEXT = 5402,
|
TaskPayloadWorkgroupEXT = 5402,
|
||||||
HitObjectAttributeEXT = 5411,
|
HitObjectAttributeEXT = 5411,
|
||||||
CodeSectionINTEL = 5605,
|
CodeSectionINTEL = 5605,
|
||||||
DeviceOnly = 5936,
|
DeviceOnly = 5936,
|
||||||
DeviceOnlyINTEL = 5936,
|
|
||||||
HostOnly = 5937,
|
HostOnly = 5937,
|
||||||
HostOnlyINTEL = 5937,
|
|
||||||
Max = 0x7fffffff,
|
Max = 0x7fffffff,
|
||||||
};
|
};
|
||||||
|
|
||||||
@@ -427,13 +413,9 @@ pub const SpvImageOperandsShift = enum(u32) {
|
|||||||
SampleShift = 6,
|
SampleShift = 6,
|
||||||
MinLodShift = 7,
|
MinLodShift = 7,
|
||||||
MakeTexelAvailableShift = 8,
|
MakeTexelAvailableShift = 8,
|
||||||
MakeTexelAvailableKHRShift = 8,
|
|
||||||
MakeTexelVisibleShift = 9,
|
MakeTexelVisibleShift = 9,
|
||||||
MakeTexelVisibleKHRShift = 9,
|
|
||||||
NonPrivateTexelShift = 10,
|
NonPrivateTexelShift = 10,
|
||||||
NonPrivateTexelKHRShift = 10,
|
|
||||||
VolatileTexelShift = 11,
|
VolatileTexelShift = 11,
|
||||||
VolatileTexelKHRShift = 11,
|
|
||||||
SignExtendShift = 12,
|
SignExtendShift = 12,
|
||||||
ZeroExtendShift = 13,
|
ZeroExtendShift = 13,
|
||||||
NontemporalShift = 14,
|
NontemporalShift = 14,
|
||||||
@@ -452,13 +434,9 @@ pub const SpvImageOperandsMask = enum(u32) {
|
|||||||
SampleMask = 0x00000040,
|
SampleMask = 0x00000040,
|
||||||
MinLodMask = 0x00000080,
|
MinLodMask = 0x00000080,
|
||||||
MakeTexelAvailableMask = 0x00000100,
|
MakeTexelAvailableMask = 0x00000100,
|
||||||
MakeTexelAvailableKHRMask = 0x00000100,
|
|
||||||
MakeTexelVisibleMask = 0x00000200,
|
MakeTexelVisibleMask = 0x00000200,
|
||||||
MakeTexelVisibleKHRMask = 0x00000200,
|
|
||||||
NonPrivateTexelMask = 0x00000400,
|
NonPrivateTexelMask = 0x00000400,
|
||||||
NonPrivateTexelKHRMask = 0x00000400,
|
|
||||||
VolatileTexelMask = 0x00000800,
|
VolatileTexelMask = 0x00000800,
|
||||||
VolatileTexelKHRMask = 0x00000800,
|
|
||||||
SignExtendMask = 0x00001000,
|
SignExtendMask = 0x00001000,
|
||||||
ZeroExtendMask = 0x00002000,
|
ZeroExtendMask = 0x00002000,
|
||||||
NontemporalMask = 0x00004000,
|
NontemporalMask = 0x00004000,
|
||||||
@@ -472,9 +450,7 @@ pub const SpvFPFastMathModeShift = enum(u32) {
|
|||||||
AllowRecipShift = 3,
|
AllowRecipShift = 3,
|
||||||
FastShift = 4,
|
FastShift = 4,
|
||||||
AllowContractShift = 16,
|
AllowContractShift = 16,
|
||||||
AllowContractFastINTELShift = 16,
|
|
||||||
AllowReassocShift = 17,
|
AllowReassocShift = 17,
|
||||||
AllowReassocINTELShift = 17,
|
|
||||||
AllowTransformShift = 18,
|
AllowTransformShift = 18,
|
||||||
Max = 0x7fffffff,
|
Max = 0x7fffffff,
|
||||||
};
|
};
|
||||||
@@ -487,9 +463,7 @@ pub const SpvFPFastMathModeMask = enum(u32) {
|
|||||||
AllowRecipMask = 0x00000008,
|
AllowRecipMask = 0x00000008,
|
||||||
FastMask = 0x00000010,
|
FastMask = 0x00000010,
|
||||||
AllowContractMask = 0x00010000,
|
AllowContractMask = 0x00010000,
|
||||||
AllowContractFastINTELMask = 0x00010000,
|
|
||||||
AllowReassocMask = 0x00020000,
|
AllowReassocMask = 0x00020000,
|
||||||
AllowReassocINTELMask = 0x00020000,
|
|
||||||
AllowTransformMask = 0x00040000,
|
AllowTransformMask = 0x00040000,
|
||||||
};
|
};
|
||||||
|
|
||||||
@@ -525,7 +499,6 @@ pub const SpvFunctionParameterAttribute = enum(u32) {
|
|||||||
NoWrite = 6,
|
NoWrite = 6,
|
||||||
NoReadWrite = 7,
|
NoReadWrite = 7,
|
||||||
RuntimeAligned = 5940,
|
RuntimeAligned = 5940,
|
||||||
RuntimeAlignedINTEL = 5940,
|
|
||||||
Max = 0x7fffffff,
|
Max = 0x7fffffff,
|
||||||
};
|
};
|
||||||
|
|
||||||
@@ -596,18 +569,13 @@ pub const SpvDecoration = enum(u32) {
|
|||||||
PassthroughNV = 5250,
|
PassthroughNV = 5250,
|
||||||
ViewportRelativeNV = 5252,
|
ViewportRelativeNV = 5252,
|
||||||
SecondaryViewportRelativeNV = 5256,
|
SecondaryViewportRelativeNV = 5256,
|
||||||
PerPrimitiveEXT = 5271,
|
PerPrimitive = 5271,
|
||||||
PerPrimitiveNV = 5271,
|
|
||||||
PerViewNV = 5272,
|
PerViewNV = 5272,
|
||||||
PerTaskNV = 5273,
|
PerTaskNV = 5273,
|
||||||
PerVertexKHR = 5285,
|
PerVertex = 5285,
|
||||||
PerVertexNV = 5285,
|
|
||||||
NonUniform = 5300,
|
NonUniform = 5300,
|
||||||
NonUniformEXT = 5300,
|
|
||||||
RestrictPointer = 5355,
|
RestrictPointer = 5355,
|
||||||
RestrictPointerEXT = 5355,
|
|
||||||
AliasedPointer = 5356,
|
AliasedPointer = 5356,
|
||||||
AliasedPointerEXT = 5356,
|
|
||||||
HitObjectShaderRecordBufferNV = 5386,
|
HitObjectShaderRecordBufferNV = 5386,
|
||||||
HitObjectShaderRecordBufferEXT = 5389,
|
HitObjectShaderRecordBufferEXT = 5389,
|
||||||
BindlessSamplerNV = 5398,
|
BindlessSamplerNV = 5398,
|
||||||
@@ -624,102 +592,59 @@ pub const SpvDecoration = enum(u32) {
|
|||||||
StackCallINTEL = 5627,
|
StackCallINTEL = 5627,
|
||||||
GlobalVariableOffsetINTEL = 5628,
|
GlobalVariableOffsetINTEL = 5628,
|
||||||
CounterBuffer = 5634,
|
CounterBuffer = 5634,
|
||||||
HlslCounterBufferGOOGLE = 5634,
|
|
||||||
HlslSemanticGOOGLE = 5635,
|
|
||||||
UserSemantic = 5635,
|
UserSemantic = 5635,
|
||||||
UserTypeGOOGLE = 5636,
|
UserTypeGOOGLE = 5636,
|
||||||
FunctionRoundingModeINTEL = 5822,
|
FunctionRoundingModeINTEL = 5822,
|
||||||
FunctionDenormModeINTEL = 5823,
|
FunctionDenormModeINTEL = 5823,
|
||||||
Register = 5825,
|
Register = 5825,
|
||||||
RegisterINTEL = 5825,
|
|
||||||
Memory = 5826,
|
Memory = 5826,
|
||||||
MemoryINTEL = 5826,
|
|
||||||
Numbanks = 5827,
|
Numbanks = 5827,
|
||||||
NumbanksINTEL = 5827,
|
|
||||||
Bankwidth = 5828,
|
Bankwidth = 5828,
|
||||||
BankwidthINTEL = 5828,
|
|
||||||
MaxPrivateCopies = 5829,
|
MaxPrivateCopies = 5829,
|
||||||
MaxPrivateCopiesINTEL = 5829,
|
|
||||||
Singlepump = 5830,
|
Singlepump = 5830,
|
||||||
SinglepumpINTEL = 5830,
|
|
||||||
Doublepump = 5831,
|
Doublepump = 5831,
|
||||||
DoublepumpINTEL = 5831,
|
|
||||||
MaxReplicates = 5832,
|
MaxReplicates = 5832,
|
||||||
MaxReplicatesINTEL = 5832,
|
|
||||||
SimpleDualPort = 5833,
|
SimpleDualPort = 5833,
|
||||||
SimpleDualPortINTEL = 5833,
|
|
||||||
Merge = 5834,
|
Merge = 5834,
|
||||||
MergeINTEL = 5834,
|
|
||||||
BankBits = 5835,
|
BankBits = 5835,
|
||||||
BankBitsINTEL = 5835,
|
|
||||||
ForcePow2Depth = 5836,
|
ForcePow2Depth = 5836,
|
||||||
ForcePow2DepthINTEL = 5836,
|
|
||||||
Stridesize = 5883,
|
Stridesize = 5883,
|
||||||
StridesizeINTEL = 5883,
|
|
||||||
Wordsize = 5884,
|
Wordsize = 5884,
|
||||||
WordsizeINTEL = 5884,
|
|
||||||
TrueDualPort = 5885,
|
TrueDualPort = 5885,
|
||||||
TrueDualPortINTEL = 5885,
|
|
||||||
BurstCoalesce = 5899,
|
BurstCoalesce = 5899,
|
||||||
BurstCoalesceINTEL = 5899,
|
|
||||||
CacheSize = 5900,
|
CacheSize = 5900,
|
||||||
CacheSizeINTEL = 5900,
|
|
||||||
DontStaticallyCoalesce = 5901,
|
DontStaticallyCoalesce = 5901,
|
||||||
DontStaticallyCoalesceINTEL = 5901,
|
|
||||||
Prefetch = 5902,
|
Prefetch = 5902,
|
||||||
PrefetchINTEL = 5902,
|
|
||||||
StallEnable = 5905,
|
StallEnable = 5905,
|
||||||
StallEnableINTEL = 5905,
|
|
||||||
FuseLoopsInFunction = 5907,
|
FuseLoopsInFunction = 5907,
|
||||||
FuseLoopsInFunctionINTEL = 5907,
|
|
||||||
MathOpDSPMode = 5909,
|
MathOpDSPMode = 5909,
|
||||||
MathOpDSPModeINTEL = 5909,
|
|
||||||
AliasScopeINTEL = 5914,
|
AliasScopeINTEL = 5914,
|
||||||
NoAliasINTEL = 5915,
|
NoAliasINTEL = 5915,
|
||||||
InitiationInterval = 5917,
|
InitiationInterval = 5917,
|
||||||
InitiationIntervalINTEL = 5917,
|
|
||||||
MaxConcurrency = 5918,
|
MaxConcurrency = 5918,
|
||||||
MaxConcurrencyINTEL = 5918,
|
|
||||||
PipelineEnable = 5919,
|
PipelineEnable = 5919,
|
||||||
PipelineEnableINTEL = 5919,
|
|
||||||
BufferLocation = 5921,
|
BufferLocation = 5921,
|
||||||
BufferLocationINTEL = 5921,
|
|
||||||
IOPipeStorage = 5944,
|
IOPipeStorage = 5944,
|
||||||
IOPipeStorageINTEL = 5944,
|
|
||||||
FunctionFloatingPointModeINTEL = 6080,
|
FunctionFloatingPointModeINTEL = 6080,
|
||||||
SingleElementVectorINTEL = 6085,
|
SingleElementVectorINTEL = 6085,
|
||||||
VectorComputeCallableFunctionINTEL = 6087,
|
VectorComputeCallableFunctionINTEL = 6087,
|
||||||
MediaBlockIOINTEL = 6140,
|
MediaBlockIOINTEL = 6140,
|
||||||
StallFree = 6151,
|
StallFree = 6151,
|
||||||
StallFreeINTEL = 6151,
|
|
||||||
FPMaxErrorDecorationINTEL = 6170,
|
FPMaxErrorDecorationINTEL = 6170,
|
||||||
LatencyControlLabel = 6172,
|
LatencyControlLabel = 6172,
|
||||||
LatencyControlLabelINTEL = 6172,
|
|
||||||
LatencyControlConstraint = 6173,
|
LatencyControlConstraint = 6173,
|
||||||
LatencyControlConstraintINTEL = 6173,
|
|
||||||
ConduitKernelArgument = 6175,
|
ConduitKernelArgument = 6175,
|
||||||
ConduitKernelArgumentINTEL = 6175,
|
|
||||||
RegisterMapKernelArgument = 6176,
|
RegisterMapKernelArgument = 6176,
|
||||||
RegisterMapKernelArgumentINTEL = 6176,
|
|
||||||
MMHostInterfaceAddressWidth = 6177,
|
MMHostInterfaceAddressWidth = 6177,
|
||||||
MMHostInterfaceAddressWidthINTEL = 6177,
|
|
||||||
MMHostInterfaceDataWidth = 6178,
|
MMHostInterfaceDataWidth = 6178,
|
||||||
MMHostInterfaceDataWidthINTEL = 6178,
|
|
||||||
MMHostInterfaceLatency = 6179,
|
MMHostInterfaceLatency = 6179,
|
||||||
MMHostInterfaceLatencyINTEL = 6179,
|
|
||||||
MMHostInterfaceReadWriteMode = 6180,
|
MMHostInterfaceReadWriteMode = 6180,
|
||||||
MMHostInterfaceReadWriteModeINTEL = 6180,
|
|
||||||
MMHostInterfaceMaxBurst = 6181,
|
MMHostInterfaceMaxBurst = 6181,
|
||||||
MMHostInterfaceMaxBurstINTEL = 6181,
|
|
||||||
MMHostInterfaceWaitRequest = 6182,
|
MMHostInterfaceWaitRequest = 6182,
|
||||||
MMHostInterfaceWaitRequestINTEL = 6182,
|
|
||||||
StableKernelArgument = 6183,
|
StableKernelArgument = 6183,
|
||||||
StableKernelArgumentINTEL = 6183,
|
|
||||||
HostAccessINTEL = 6188,
|
HostAccessINTEL = 6188,
|
||||||
InitMode = 6190,
|
InitMode = 6190,
|
||||||
InitModeINTEL = 6190,
|
|
||||||
ImplementInRegisterMap = 6191,
|
ImplementInRegisterMap = 6191,
|
||||||
ImplementInRegisterMapINTEL = 6191,
|
|
||||||
ConditionalINTEL = 6247,
|
ConditionalINTEL = 6247,
|
||||||
CacheControlLoadINTEL = 6442,
|
CacheControlLoadINTEL = 6442,
|
||||||
CacheControlStoreINTEL = 6443,
|
CacheControlStoreINTEL = 6443,
|
||||||
@@ -774,15 +699,10 @@ pub const SpvBuiltIn = enum(u32) {
|
|||||||
WarpIDARM = 4163,
|
WarpIDARM = 4163,
|
||||||
WarpMaxIDARM = 4164,
|
WarpMaxIDARM = 4164,
|
||||||
SubgroupEqMask = 4416,
|
SubgroupEqMask = 4416,
|
||||||
SubgroupEqMaskKHR = 4416,
|
|
||||||
SubgroupGeMask = 4417,
|
SubgroupGeMask = 4417,
|
||||||
SubgroupGeMaskKHR = 4417,
|
|
||||||
SubgroupGtMask = 4418,
|
SubgroupGtMask = 4418,
|
||||||
SubgroupGtMaskKHR = 4418,
|
|
||||||
SubgroupLeMask = 4419,
|
SubgroupLeMask = 4419,
|
||||||
SubgroupLeMaskKHR = 4419,
|
|
||||||
SubgroupLtMask = 4420,
|
SubgroupLtMask = 4420,
|
||||||
SubgroupLtMaskKHR = 4420,
|
|
||||||
BaseVertex = 4424,
|
BaseVertex = 4424,
|
||||||
BaseInstance = 4425,
|
BaseInstance = 4425,
|
||||||
DrawIndex = 4426,
|
DrawIndex = 4426,
|
||||||
@@ -817,49 +737,32 @@ pub const SpvBuiltIn = enum(u32) {
|
|||||||
LayerPerViewNV = 5279,
|
LayerPerViewNV = 5279,
|
||||||
MeshViewCountNV = 5280,
|
MeshViewCountNV = 5280,
|
||||||
MeshViewIndicesNV = 5281,
|
MeshViewIndicesNV = 5281,
|
||||||
BaryCoordKHR = 5286,
|
BaryCoord = 5286,
|
||||||
BaryCoordNV = 5286,
|
BaryCoordNoPersp = 5287,
|
||||||
BaryCoordNoPerspKHR = 5287,
|
FragmentSize = 5292,
|
||||||
BaryCoordNoPerspNV = 5287,
|
FragInvocationCount = 5293,
|
||||||
FragSizeEXT = 5292,
|
|
||||||
FragmentSizeNV = 5292,
|
|
||||||
FragInvocationCountEXT = 5293,
|
|
||||||
InvocationsPerPixelNV = 5293,
|
|
||||||
PrimitivePointIndicesEXT = 5294,
|
PrimitivePointIndicesEXT = 5294,
|
||||||
PrimitiveLineIndicesEXT = 5295,
|
PrimitiveLineIndicesEXT = 5295,
|
||||||
PrimitiveTriangleIndicesEXT = 5296,
|
PrimitiveTriangleIndicesEXT = 5296,
|
||||||
CullPrimitiveEXT = 5299,
|
CullPrimitiveEXT = 5299,
|
||||||
LaunchIdKHR = 5319,
|
LaunchId = 5319,
|
||||||
LaunchIdNV = 5319,
|
LaunchSize = 5320,
|
||||||
LaunchSizeKHR = 5320,
|
WorldRayOrigin = 5321,
|
||||||
LaunchSizeNV = 5320,
|
WorldRayDirection = 5322,
|
||||||
WorldRayOriginKHR = 5321,
|
ObjectRayOrigin = 5323,
|
||||||
WorldRayOriginNV = 5321,
|
ObjectRayDirection = 5324,
|
||||||
WorldRayDirectionKHR = 5322,
|
RayTmin = 5325,
|
||||||
WorldRayDirectionNV = 5322,
|
RayTmax = 5326,
|
||||||
ObjectRayOriginKHR = 5323,
|
InstanceCustomIndex = 5327,
|
||||||
ObjectRayOriginNV = 5323,
|
ObjectToWorld = 5330,
|
||||||
ObjectRayDirectionKHR = 5324,
|
WorldToObject = 5331,
|
||||||
ObjectRayDirectionNV = 5324,
|
|
||||||
RayTminKHR = 5325,
|
|
||||||
RayTminNV = 5325,
|
|
||||||
RayTmaxKHR = 5326,
|
|
||||||
RayTmaxNV = 5326,
|
|
||||||
InstanceCustomIndexKHR = 5327,
|
|
||||||
InstanceCustomIndexNV = 5327,
|
|
||||||
ObjectToWorldKHR = 5330,
|
|
||||||
ObjectToWorldNV = 5330,
|
|
||||||
WorldToObjectKHR = 5331,
|
|
||||||
WorldToObjectNV = 5331,
|
|
||||||
HitTNV = 5332,
|
HitTNV = 5332,
|
||||||
HitKindKHR = 5333,
|
HitKind = 5333,
|
||||||
HitKindNV = 5333,
|
|
||||||
CurrentRayTimeNV = 5334,
|
CurrentRayTimeNV = 5334,
|
||||||
HitTriangleVertexPositionsKHR = 5335,
|
HitTriangleVertexPositionsKHR = 5335,
|
||||||
HitMicroTriangleVertexPositionsNV = 5337,
|
HitMicroTriangleVertexPositionsNV = 5337,
|
||||||
HitMicroTriangleVertexBarycentricsNV = 5344,
|
HitMicroTriangleVertexBarycentricsNV = 5344,
|
||||||
IncomingRayFlagsKHR = 5351,
|
IncomingRayFlags = 5351,
|
||||||
IncomingRayFlagsNV = 5351,
|
|
||||||
RayGeometryIndexKHR = 5352,
|
RayGeometryIndexKHR = 5352,
|
||||||
HitIsSphereNV = 5359,
|
HitIsSphereNV = 5359,
|
||||||
HitIsLSSNV = 5360,
|
HitIsLSSNV = 5360,
|
||||||
@@ -901,25 +804,15 @@ pub const SpvLoopControlShift = enum(u32) {
|
|||||||
PeelCountShift = 7,
|
PeelCountShift = 7,
|
||||||
PartialCountShift = 8,
|
PartialCountShift = 8,
|
||||||
InitiationIntervalShift = 16,
|
InitiationIntervalShift = 16,
|
||||||
InitiationIntervalINTELShift = 16,
|
|
||||||
MaxConcurrencyShift = 17,
|
MaxConcurrencyShift = 17,
|
||||||
MaxConcurrencyINTELShift = 17,
|
|
||||||
DependencyArrayShift = 18,
|
DependencyArrayShift = 18,
|
||||||
DependencyArrayINTELShift = 18,
|
|
||||||
PipelineEnableShift = 19,
|
PipelineEnableShift = 19,
|
||||||
PipelineEnableINTELShift = 19,
|
|
||||||
LoopCoalesceShift = 20,
|
LoopCoalesceShift = 20,
|
||||||
LoopCoalesceINTELShift = 20,
|
|
||||||
MaxInterleavingShift = 21,
|
MaxInterleavingShift = 21,
|
||||||
MaxInterleavingINTELShift = 21,
|
|
||||||
SpeculatedIterationsShift = 22,
|
SpeculatedIterationsShift = 22,
|
||||||
SpeculatedIterationsINTELShift = 22,
|
|
||||||
NoFusionShift = 23,
|
NoFusionShift = 23,
|
||||||
NoFusionINTELShift = 23,
|
|
||||||
LoopCountShift = 24,
|
LoopCountShift = 24,
|
||||||
LoopCountINTELShift = 24,
|
|
||||||
MaxReinvocationDelayShift = 25,
|
MaxReinvocationDelayShift = 25,
|
||||||
MaxReinvocationDelayINTELShift = 25,
|
|
||||||
Max = 0x7fffffff,
|
Max = 0x7fffffff,
|
||||||
};
|
};
|
||||||
|
|
||||||
@@ -935,25 +828,15 @@ pub const SpvLoopControlMask = enum(u32) {
|
|||||||
PeelCountMask = 0x00000080,
|
PeelCountMask = 0x00000080,
|
||||||
PartialCountMask = 0x00000100,
|
PartialCountMask = 0x00000100,
|
||||||
InitiationIntervalMask = 0x00010000,
|
InitiationIntervalMask = 0x00010000,
|
||||||
InitiationIntervalINTELMask = 0x00010000,
|
|
||||||
MaxConcurrencyMask = 0x00020000,
|
MaxConcurrencyMask = 0x00020000,
|
||||||
MaxConcurrencyINTELMask = 0x00020000,
|
|
||||||
DependencyArrayMask = 0x00040000,
|
DependencyArrayMask = 0x00040000,
|
||||||
DependencyArrayINTELMask = 0x00040000,
|
|
||||||
PipelineEnableMask = 0x00080000,
|
PipelineEnableMask = 0x00080000,
|
||||||
PipelineEnableINTELMask = 0x00080000,
|
|
||||||
LoopCoalesceMask = 0x00100000,
|
LoopCoalesceMask = 0x00100000,
|
||||||
LoopCoalesceINTELMask = 0x00100000,
|
|
||||||
MaxInterleavingMask = 0x00200000,
|
MaxInterleavingMask = 0x00200000,
|
||||||
MaxInterleavingINTELMask = 0x00200000,
|
|
||||||
SpeculatedIterationsMask = 0x00400000,
|
SpeculatedIterationsMask = 0x00400000,
|
||||||
SpeculatedIterationsINTELMask = 0x00400000,
|
|
||||||
NoFusionMask = 0x00800000,
|
NoFusionMask = 0x00800000,
|
||||||
NoFusionINTELMask = 0x00800000,
|
|
||||||
LoopCountMask = 0x01000000,
|
LoopCountMask = 0x01000000,
|
||||||
LoopCountINTELMask = 0x01000000,
|
|
||||||
MaxReinvocationDelayMask = 0x02000000,
|
MaxReinvocationDelayMask = 0x02000000,
|
||||||
MaxReinvocationDelayINTELMask = 0x02000000,
|
|
||||||
};
|
};
|
||||||
|
|
||||||
pub const SpvFunctionControlShift = enum(u32) {
|
pub const SpvFunctionControlShift = enum(u32) {
|
||||||
@@ -962,7 +845,6 @@ pub const SpvFunctionControlShift = enum(u32) {
|
|||||||
PureShift = 2,
|
PureShift = 2,
|
||||||
ConstShift = 3,
|
ConstShift = 3,
|
||||||
OptNoneEXTShift = 16,
|
OptNoneEXTShift = 16,
|
||||||
OptNoneINTELShift = 16,
|
|
||||||
Max = 0x7fffffff,
|
Max = 0x7fffffff,
|
||||||
};
|
};
|
||||||
|
|
||||||
@@ -973,7 +855,6 @@ pub const SpvFunctionControlMask = enum(u32) {
|
|||||||
PureMask = 0x00000004,
|
PureMask = 0x00000004,
|
||||||
ConstMask = 0x00000008,
|
ConstMask = 0x00000008,
|
||||||
OptNoneEXTMask = 0x00010000,
|
OptNoneEXTMask = 0x00010000,
|
||||||
OptNoneINTELMask = 0x00010000,
|
|
||||||
};
|
};
|
||||||
|
|
||||||
pub const SpvMemorySemanticsShift = enum(u32) {
|
pub const SpvMemorySemanticsShift = enum(u32) {
|
||||||
@@ -988,11 +869,8 @@ pub const SpvMemorySemanticsShift = enum(u32) {
|
|||||||
AtomicCounterMemoryShift = 10,
|
AtomicCounterMemoryShift = 10,
|
||||||
ImageMemoryShift = 11,
|
ImageMemoryShift = 11,
|
||||||
OutputMemoryShift = 12,
|
OutputMemoryShift = 12,
|
||||||
OutputMemoryKHRShift = 12,
|
|
||||||
MakeAvailableShift = 13,
|
MakeAvailableShift = 13,
|
||||||
MakeAvailableKHRShift = 13,
|
|
||||||
MakeVisibleShift = 14,
|
MakeVisibleShift = 14,
|
||||||
MakeVisibleKHRShift = 14,
|
|
||||||
VolatileShift = 15,
|
VolatileShift = 15,
|
||||||
Max = 0x7fffffff,
|
Max = 0x7fffffff,
|
||||||
};
|
};
|
||||||
@@ -1010,11 +888,8 @@ pub const SpvMemorySemanticsMask = enum(u32) {
|
|||||||
AtomicCounterMemoryMask = 0x00000400,
|
AtomicCounterMemoryMask = 0x00000400,
|
||||||
ImageMemoryMask = 0x00000800,
|
ImageMemoryMask = 0x00000800,
|
||||||
OutputMemoryMask = 0x00001000,
|
OutputMemoryMask = 0x00001000,
|
||||||
OutputMemoryKHRMask = 0x00001000,
|
|
||||||
MakeAvailableMask = 0x00002000,
|
MakeAvailableMask = 0x00002000,
|
||||||
MakeAvailableKHRMask = 0x00002000,
|
|
||||||
MakeVisibleMask = 0x00004000,
|
MakeVisibleMask = 0x00004000,
|
||||||
MakeVisibleKHRMask = 0x00004000,
|
|
||||||
VolatileMask = 0x00008000,
|
VolatileMask = 0x00008000,
|
||||||
};
|
};
|
||||||
|
|
||||||
@@ -1023,11 +898,8 @@ pub const SpvMemoryAccessShift = enum(u32) {
|
|||||||
AlignedShift = 1,
|
AlignedShift = 1,
|
||||||
NontemporalShift = 2,
|
NontemporalShift = 2,
|
||||||
MakePointerAvailableShift = 3,
|
MakePointerAvailableShift = 3,
|
||||||
MakePointerAvailableKHRShift = 3,
|
|
||||||
MakePointerVisibleShift = 4,
|
MakePointerVisibleShift = 4,
|
||||||
MakePointerVisibleKHRShift = 4,
|
|
||||||
NonPrivatePointerShift = 5,
|
NonPrivatePointerShift = 5,
|
||||||
NonPrivatePointerKHRShift = 5,
|
|
||||||
AliasScopeINTELMaskShift = 16,
|
AliasScopeINTELMaskShift = 16,
|
||||||
NoAliasINTELMaskShift = 17,
|
NoAliasINTELMaskShift = 17,
|
||||||
Max = 0x7fffffff,
|
Max = 0x7fffffff,
|
||||||
@@ -1039,11 +911,8 @@ pub const SpvMemoryAccessMask = enum(u32) {
|
|||||||
AlignedMask = 0x00000002,
|
AlignedMask = 0x00000002,
|
||||||
NontemporalMask = 0x00000004,
|
NontemporalMask = 0x00000004,
|
||||||
MakePointerAvailableMask = 0x00000008,
|
MakePointerAvailableMask = 0x00000008,
|
||||||
MakePointerAvailableKHRMask = 0x00000008,
|
|
||||||
MakePointerVisibleMask = 0x00000010,
|
MakePointerVisibleMask = 0x00000010,
|
||||||
MakePointerVisibleKHRMask = 0x00000010,
|
|
||||||
NonPrivatePointerMask = 0x00000020,
|
NonPrivatePointerMask = 0x00000020,
|
||||||
NonPrivatePointerKHRMask = 0x00000020,
|
|
||||||
AliasScopeINTELMaskMask = 0x00010000,
|
AliasScopeINTELMaskMask = 0x00010000,
|
||||||
NoAliasINTELMaskMask = 0x00020000,
|
NoAliasINTELMaskMask = 0x00020000,
|
||||||
};
|
};
|
||||||
@@ -1055,7 +924,6 @@ pub const SpvScope = enum(u32) {
|
|||||||
Subgroup = 3,
|
Subgroup = 3,
|
||||||
Invocation = 4,
|
Invocation = 4,
|
||||||
QueueFamily = 5,
|
QueueFamily = 5,
|
||||||
QueueFamilyKHR = 5,
|
|
||||||
ShaderCallKHR = 6,
|
ShaderCallKHR = 6,
|
||||||
Max = 0x7fffffff,
|
Max = 0x7fffffff,
|
||||||
};
|
};
|
||||||
@@ -1178,8 +1046,6 @@ pub const SpvCapability = enum(u32) {
|
|||||||
WorkgroupMemoryExplicitLayout16BitAccessKHR = 4430,
|
WorkgroupMemoryExplicitLayout16BitAccessKHR = 4430,
|
||||||
SubgroupVoteKHR = 4431,
|
SubgroupVoteKHR = 4431,
|
||||||
StorageBuffer16BitAccess = 4433,
|
StorageBuffer16BitAccess = 4433,
|
||||||
StorageUniformBufferBlock16 = 4433,
|
|
||||||
StorageUniform16 = 4434,
|
|
||||||
UniformAndStorageBuffer16BitAccess = 4434,
|
UniformAndStorageBuffer16BitAccess = 4434,
|
||||||
StoragePushConstant16 = 4435,
|
StoragePushConstant16 = 4435,
|
||||||
StorageInputOutput16 = 4436,
|
StorageInputOutput16 = 4436,
|
||||||
@@ -1224,8 +1090,7 @@ pub const SpvCapability = enum(u32) {
|
|||||||
BFloat16CooperativeMatrixKHR = 5118,
|
BFloat16CooperativeMatrixKHR = 5118,
|
||||||
SampleMaskOverrideCoverageNV = 5249,
|
SampleMaskOverrideCoverageNV = 5249,
|
||||||
GeometryShaderPassthroughNV = 5251,
|
GeometryShaderPassthroughNV = 5251,
|
||||||
ShaderViewportIndexLayerEXT = 5254,
|
ShaderViewportIndexLayer = 5254,
|
||||||
ShaderViewportIndexLayerNV = 5254,
|
|
||||||
ShaderViewportMaskNV = 5255,
|
ShaderViewportMaskNV = 5255,
|
||||||
ShaderStereoViewNV = 5259,
|
ShaderStereoViewNV = 5259,
|
||||||
PerViewAttributesNV = 5260,
|
PerViewAttributesNV = 5260,
|
||||||
@@ -1233,48 +1098,29 @@ pub const SpvCapability = enum(u32) {
|
|||||||
MeshShadingNV = 5266,
|
MeshShadingNV = 5266,
|
||||||
ImageFootprintNV = 5282,
|
ImageFootprintNV = 5282,
|
||||||
MeshShadingEXT = 5283,
|
MeshShadingEXT = 5283,
|
||||||
FragmentBarycentricKHR = 5284,
|
FragmentBarycentric = 5284,
|
||||||
FragmentBarycentricNV = 5284,
|
ComputeDerivativeGroupQuads = 5288,
|
||||||
ComputeDerivativeGroupQuadsKHR = 5288,
|
ShadingRate = 5291,
|
||||||
ComputeDerivativeGroupQuadsNV = 5288,
|
|
||||||
FragmentDensityEXT = 5291,
|
|
||||||
ShadingRateNV = 5291,
|
|
||||||
GroupNonUniformPartitionedNV = 5297,
|
GroupNonUniformPartitionedNV = 5297,
|
||||||
ShaderNonUniform = 5301,
|
ShaderNonUniform = 5301,
|
||||||
ShaderNonUniformEXT = 5301,
|
|
||||||
RuntimeDescriptorArray = 5302,
|
RuntimeDescriptorArray = 5302,
|
||||||
RuntimeDescriptorArrayEXT = 5302,
|
|
||||||
InputAttachmentArrayDynamicIndexing = 5303,
|
InputAttachmentArrayDynamicIndexing = 5303,
|
||||||
InputAttachmentArrayDynamicIndexingEXT = 5303,
|
|
||||||
UniformTexelBufferArrayDynamicIndexing = 5304,
|
UniformTexelBufferArrayDynamicIndexing = 5304,
|
||||||
UniformTexelBufferArrayDynamicIndexingEXT = 5304,
|
|
||||||
StorageTexelBufferArrayDynamicIndexing = 5305,
|
StorageTexelBufferArrayDynamicIndexing = 5305,
|
||||||
StorageTexelBufferArrayDynamicIndexingEXT = 5305,
|
|
||||||
UniformBufferArrayNonUniformIndexing = 5306,
|
UniformBufferArrayNonUniformIndexing = 5306,
|
||||||
UniformBufferArrayNonUniformIndexingEXT = 5306,
|
|
||||||
SampledImageArrayNonUniformIndexing = 5307,
|
SampledImageArrayNonUniformIndexing = 5307,
|
||||||
SampledImageArrayNonUniformIndexingEXT = 5307,
|
|
||||||
StorageBufferArrayNonUniformIndexing = 5308,
|
StorageBufferArrayNonUniformIndexing = 5308,
|
||||||
StorageBufferArrayNonUniformIndexingEXT = 5308,
|
|
||||||
StorageImageArrayNonUniformIndexing = 5309,
|
StorageImageArrayNonUniformIndexing = 5309,
|
||||||
StorageImageArrayNonUniformIndexingEXT = 5309,
|
|
||||||
InputAttachmentArrayNonUniformIndexing = 5310,
|
InputAttachmentArrayNonUniformIndexing = 5310,
|
||||||
InputAttachmentArrayNonUniformIndexingEXT = 5310,
|
|
||||||
UniformTexelBufferArrayNonUniformIndexing = 5311,
|
UniformTexelBufferArrayNonUniformIndexing = 5311,
|
||||||
UniformTexelBufferArrayNonUniformIndexingEXT = 5311,
|
|
||||||
StorageTexelBufferArrayNonUniformIndexing = 5312,
|
StorageTexelBufferArrayNonUniformIndexing = 5312,
|
||||||
StorageTexelBufferArrayNonUniformIndexingEXT = 5312,
|
|
||||||
RayTracingPositionFetchKHR = 5336,
|
RayTracingPositionFetchKHR = 5336,
|
||||||
RayTracingNV = 5340,
|
RayTracingNV = 5340,
|
||||||
RayTracingMotionBlurNV = 5341,
|
RayTracingMotionBlurNV = 5341,
|
||||||
VulkanMemoryModel = 5345,
|
VulkanMemoryModel = 5345,
|
||||||
VulkanMemoryModelKHR = 5345,
|
|
||||||
VulkanMemoryModelDeviceScope = 5346,
|
VulkanMemoryModelDeviceScope = 5346,
|
||||||
VulkanMemoryModelDeviceScopeKHR = 5346,
|
|
||||||
PhysicalStorageBufferAddresses = 5347,
|
PhysicalStorageBufferAddresses = 5347,
|
||||||
PhysicalStorageBufferAddressesEXT = 5347,
|
ComputeDerivativeGroupLinear = 5350,
|
||||||
ComputeDerivativeGroupLinearKHR = 5350,
|
|
||||||
ComputeDerivativeGroupLinearNV = 5350,
|
|
||||||
RayTracingProvisionalKHR = 5353,
|
RayTracingProvisionalKHR = 5353,
|
||||||
CooperativeMatrixNV = 5357,
|
CooperativeMatrixNV = 5357,
|
||||||
FragmentShaderSampleInterlockEXT = 5363,
|
FragmentShaderSampleInterlockEXT = 5363,
|
||||||
@@ -1282,7 +1128,6 @@ pub const SpvCapability = enum(u32) {
|
|||||||
ShaderSMBuiltinsNV = 5373,
|
ShaderSMBuiltinsNV = 5373,
|
||||||
FragmentShaderPixelInterlockEXT = 5378,
|
FragmentShaderPixelInterlockEXT = 5378,
|
||||||
DemoteToHelperInvocation = 5379,
|
DemoteToHelperInvocation = 5379,
|
||||||
DemoteToHelperInvocationEXT = 5379,
|
|
||||||
DisplacementMicromapNV = 5380,
|
DisplacementMicromapNV = 5380,
|
||||||
RayTracingOpacityMicromapEXT = 5381,
|
RayTracingOpacityMicromapEXT = 5381,
|
||||||
ShaderInvocationReorderNV = 5383,
|
ShaderInvocationReorderNV = 5383,
|
||||||
@@ -1327,50 +1172,30 @@ pub const SpvCapability = enum(u32) {
|
|||||||
VariableLengthArrayINTEL = 5817,
|
VariableLengthArrayINTEL = 5817,
|
||||||
FunctionFloatControlINTEL = 5821,
|
FunctionFloatControlINTEL = 5821,
|
||||||
FPGAMemoryAttributes = 5824,
|
FPGAMemoryAttributes = 5824,
|
||||||
FPGAMemoryAttributesINTEL = 5824,
|
|
||||||
FPFastMathModeINTEL = 5837,
|
FPFastMathModeINTEL = 5837,
|
||||||
ArbitraryPrecisionIntegers = 5844,
|
ArbitraryPrecisionIntegers = 5844,
|
||||||
ArbitraryPrecisionIntegersINTEL = 5844,
|
|
||||||
ArbitraryPrecisionFloatingPoint = 5845,
|
ArbitraryPrecisionFloatingPoint = 5845,
|
||||||
ArbitraryPrecisionFloatingPointINTEL = 5845,
|
|
||||||
UnstructuredLoopControlsINTEL = 5886,
|
UnstructuredLoopControlsINTEL = 5886,
|
||||||
FPGALoopControls = 5888,
|
FPGALoopControls = 5888,
|
||||||
FPGALoopControlsINTEL = 5888,
|
|
||||||
KernelAttributesINTEL = 5892,
|
KernelAttributesINTEL = 5892,
|
||||||
FPGAKernelAttributesINTEL = 5897,
|
FPGAKernelAttributesINTEL = 5897,
|
||||||
FPGAMemoryAccesses = 5898,
|
FPGAMemoryAccesses = 5898,
|
||||||
FPGAMemoryAccessesINTEL = 5898,
|
|
||||||
FPGAClusterAttributes = 5904,
|
FPGAClusterAttributes = 5904,
|
||||||
FPGAClusterAttributesINTEL = 5904,
|
|
||||||
LoopFuse = 5906,
|
LoopFuse = 5906,
|
||||||
LoopFuseINTEL = 5906,
|
|
||||||
FPGADSPControl = 5908,
|
FPGADSPControl = 5908,
|
||||||
FPGADSPControlINTEL = 5908,
|
|
||||||
MemoryAccessAliasingINTEL = 5910,
|
MemoryAccessAliasingINTEL = 5910,
|
||||||
FPGAInvocationPipeliningAttributes = 5916,
|
FPGAInvocationPipeliningAttributes = 5916,
|
||||||
FPGAInvocationPipeliningAttributesINTEL = 5916,
|
|
||||||
FPGABufferLocation = 5920,
|
FPGABufferLocation = 5920,
|
||||||
FPGABufferLocationINTEL = 5920,
|
|
||||||
ArbitraryPrecisionFixedPoint = 5922,
|
ArbitraryPrecisionFixedPoint = 5922,
|
||||||
ArbitraryPrecisionFixedPointINTEL = 5922,
|
|
||||||
USMStorageClasses = 5935,
|
USMStorageClasses = 5935,
|
||||||
USMStorageClassesINTEL = 5935,
|
|
||||||
RuntimeAlignedAttribute = 5939,
|
RuntimeAlignedAttribute = 5939,
|
||||||
RuntimeAlignedAttributeINTEL = 5939,
|
|
||||||
IOPipes = 5943,
|
IOPipes = 5943,
|
||||||
IOPipesINTEL = 5943,
|
|
||||||
BlockingPipes = 5945,
|
BlockingPipes = 5945,
|
||||||
BlockingPipesINTEL = 5945,
|
|
||||||
FPGAReg = 5948,
|
FPGAReg = 5948,
|
||||||
FPGARegINTEL = 5948,
|
|
||||||
DotProductInputAll = 6016,
|
DotProductInputAll = 6016,
|
||||||
DotProductInputAllKHR = 6016,
|
|
||||||
DotProductInput4x8Bit = 6017,
|
DotProductInput4x8Bit = 6017,
|
||||||
DotProductInput4x8BitKHR = 6017,
|
|
||||||
DotProductInput4x8BitPacked = 6018,
|
DotProductInput4x8BitPacked = 6018,
|
||||||
DotProductInput4x8BitPackedKHR = 6018,
|
|
||||||
DotProduct = 6019,
|
DotProduct = 6019,
|
||||||
DotProductKHR = 6019,
|
|
||||||
RayCullMaskKHR = 6020,
|
RayCullMaskKHR = 6020,
|
||||||
CooperativeMatrixKHR = 6022,
|
CooperativeMatrixKHR = 6022,
|
||||||
ReplicatedCompositesEXT = 6024,
|
ReplicatedCompositesEXT = 6024,
|
||||||
@@ -1381,26 +1206,20 @@ pub const SpvCapability = enum(u32) {
|
|||||||
AtomicFloat32AddEXT = 6033,
|
AtomicFloat32AddEXT = 6033,
|
||||||
AtomicFloat64AddEXT = 6034,
|
AtomicFloat64AddEXT = 6034,
|
||||||
LongCompositesINTEL = 6089,
|
LongCompositesINTEL = 6089,
|
||||||
OptNoneEXT = 6094,
|
OptNone = 6094,
|
||||||
OptNoneINTEL = 6094,
|
|
||||||
AtomicFloat16AddEXT = 6095,
|
AtomicFloat16AddEXT = 6095,
|
||||||
DebugInfoModuleINTEL = 6114,
|
DebugInfoModuleINTEL = 6114,
|
||||||
BFloat16ConversionINTEL = 6115,
|
BFloat16ConversionINTEL = 6115,
|
||||||
SplitBarrierINTEL = 6141,
|
SplitBarrierINTEL = 6141,
|
||||||
ArithmeticFenceEXT = 6144,
|
ArithmeticFenceEXT = 6144,
|
||||||
FPGAClusterAttributesV2 = 6150,
|
FPGAClusterAttributesV2 = 6150,
|
||||||
FPGAClusterAttributesV2INTEL = 6150,
|
|
||||||
FPGAKernelAttributesv2INTEL = 6161,
|
FPGAKernelAttributesv2INTEL = 6161,
|
||||||
TaskSequence = 6162,
|
TaskSequence = 6162,
|
||||||
TaskSequenceINTEL = 6162,
|
|
||||||
FPMaxErrorINTEL = 6169,
|
FPMaxErrorINTEL = 6169,
|
||||||
FPGALatencyControl = 6171,
|
FPGALatencyControl = 6171,
|
||||||
FPGALatencyControlINTEL = 6171,
|
|
||||||
FPGAArgumentInterfaces = 6174,
|
FPGAArgumentInterfaces = 6174,
|
||||||
FPGAArgumentInterfacesINTEL = 6174,
|
|
||||||
GlobalVariableHostAccessINTEL = 6187,
|
GlobalVariableHostAccessINTEL = 6187,
|
||||||
GlobalVariableFPGADecorations = 6189,
|
GlobalVariableFPGADecorations = 6189,
|
||||||
GlobalVariableFPGADecorationsINTEL = 6189,
|
|
||||||
SubgroupBufferPrefetchINTEL = 6220,
|
SubgroupBufferPrefetchINTEL = 6220,
|
||||||
Subgroup2DBlockIOINTEL = 6228,
|
Subgroup2DBlockIOINTEL = 6228,
|
||||||
Subgroup2DBlockTransformINTEL = 6229,
|
Subgroup2DBlockTransformINTEL = 6229,
|
||||||
@@ -1428,8 +1247,7 @@ pub const SpvRayFlagsShift = enum(u32) {
|
|||||||
CullFrontFacingTrianglesKHRShift = 5,
|
CullFrontFacingTrianglesKHRShift = 5,
|
||||||
CullOpaqueKHRShift = 6,
|
CullOpaqueKHRShift = 6,
|
||||||
CullNoOpaqueKHRShift = 7,
|
CullNoOpaqueKHRShift = 7,
|
||||||
SkipBuiltinPrimitivesNVShift = 8,
|
SkipBuiltinPrimitivesShift = 8,
|
||||||
SkipTrianglesKHRShift = 8,
|
|
||||||
SkipAABBsKHRShift = 9,
|
SkipAABBsKHRShift = 9,
|
||||||
ForceOpacityMicromap2StateEXTShift = 10,
|
ForceOpacityMicromap2StateEXTShift = 10,
|
||||||
Max = 0x7fffffff,
|
Max = 0x7fffffff,
|
||||||
@@ -1445,8 +1263,7 @@ pub const SpvRayFlagsMask = enum(u32) {
|
|||||||
CullFrontFacingTrianglesKHRMask = 0x00000020,
|
CullFrontFacingTrianglesKHRMask = 0x00000020,
|
||||||
CullOpaqueKHRMask = 0x00000040,
|
CullOpaqueKHRMask = 0x00000040,
|
||||||
CullNoOpaqueKHRMask = 0x00000080,
|
CullNoOpaqueKHRMask = 0x00000080,
|
||||||
SkipBuiltinPrimitivesNVMask = 0x00000100,
|
SkipBuiltinPrimitivesMask = 0x00000100,
|
||||||
SkipTrianglesKHRMask = 0x00000100,
|
|
||||||
SkipAABBsKHRMask = 0x00000200,
|
SkipAABBsKHRMask = 0x00000200,
|
||||||
ForceOpacityMicromap2StateEXTMask = 0x00000400,
|
ForceOpacityMicromap2StateEXTMask = 0x00000400,
|
||||||
};
|
};
|
||||||
@@ -1520,7 +1337,6 @@ pub const SpvOverflowModes = enum(u32) {
|
|||||||
|
|
||||||
pub const SpvPackedVectorFormat = enum(u32) {
|
pub const SpvPackedVectorFormat = enum(u32) {
|
||||||
PackedVectorFormat4x8Bit = 0,
|
PackedVectorFormat4x8Bit = 0,
|
||||||
PackedVectorFormat4x8BitKHR = 0,
|
|
||||||
Max = 0x7fffffff,
|
Max = 0x7fffffff,
|
||||||
};
|
};
|
||||||
|
|
||||||
@@ -1612,9 +1428,7 @@ pub const SpvTensorOperandsMask = enum(u32) {
|
|||||||
|
|
||||||
pub const SpvInitializationModeQualifier = enum(u32) {
|
pub const SpvInitializationModeQualifier = enum(u32) {
|
||||||
InitOnDeviceReprogram = 0,
|
InitOnDeviceReprogram = 0,
|
||||||
InitOnDeviceReprogramINTEL = 0,
|
|
||||||
InitOnDeviceReset = 1,
|
InitOnDeviceReset = 1,
|
||||||
InitOnDeviceResetINTEL = 1,
|
|
||||||
Max = 0x7fffffff,
|
Max = 0x7fffffff,
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|||||||
Reference in New Issue
Block a user